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-rw-r--r--src/mainboard/intel/saddlebrook/cmos.layout54
1 files changed, 27 insertions, 27 deletions
diff --git a/src/mainboard/intel/saddlebrook/cmos.layout b/src/mainboard/intel/saddlebrook/cmos.layout
index 82d91a3c76..5a92ae07c9 100644
--- a/src/mainboard/intel/saddlebrook/cmos.layout
+++ b/src/mainboard/intel/saddlebrook/cmos.layout
@@ -3,54 +3,54 @@
# -----------------------------------------------------------------
entries
-#start-bit length config config-ID name
+#start-bit length config config-ID name
# -----------------------------------------------------------------
-0 120 r 0 reserved_memory
+0 120 r 0 reserved_memory
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
-384 1 e 4 boot_option
-388 4 h 0 reboot_counter
+384 1 e 4 boot_option
+388 4 h 0 reboot_counter
# -----------------------------------------------------------------
# coreboot config options: console
-392 3 r 0 unused
-395 4 e 6 debug_level
+392 3 r 0 unused
+395 4 e 6 debug_level
# coreboot config options: cpu
# coreboot config options: southbridge
-409 2 e 7 power_on_after_fail
+409 2 e 7 power_on_after_fail
# coreboot config options: bootloader
# coreboot config options: check sums
-984 16 h 0 check_sum
+984 16 h 0 check_sum
# -----------------------------------------------------------------
enumerations
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-6 0 Emergency
-6 1 Alert
-6 2 Critical
-6 3 Error
-6 4 Warning
-6 5 Notice
-6 6 Info
-6 7 Debug
-6 8 Spew
-7 0 Disable
-7 1 Enable
-7 2 Keep
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+6 0 Emergency
+6 1 Alert
+6 2 Critical
+6 3 Error
+6 4 Warning
+6 5 Notice
+6 6 Info
+6 7 Debug
+6 8 Spew
+7 0 Disable
+7 1 Enable
+7 2 Keep
# -----------------------------------------------------------------
checksums