diff options
Diffstat (limited to 'src/mainboard/intel/xe7501devkit')
-rw-r--r-- | src/mainboard/intel/xe7501devkit/Kconfig | 2 | ||||
-rw-r--r-- | src/mainboard/intel/xe7501devkit/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/intel/xe7501devkit/failover.c | 2 | ||||
-rw-r--r-- | src/mainboard/intel/xe7501devkit/reset.c | 4 | ||||
-rw-r--r-- | src/mainboard/intel/xe7501devkit/romstage.c | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/intel/xe7501devkit/Kconfig b/src/mainboard/intel/xe7501devkit/Kconfig index 72c1d94fb2..d2a9f4779f 100644 --- a/src/mainboard/intel/xe7501devkit/Kconfig +++ b/src/mainboard/intel/xe7501devkit/Kconfig @@ -4,7 +4,7 @@ config BOARD_INTEL_XE7501DEVKIT select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7501 select SOUTHBRIDGE_INTEL_I82870 - select SOUTHBRIDGE_INTEL_I82801CA + select SOUTHBRIDGE_INTEL_I82801CX select SUPERIO_SMSC_LPC47B272 select ROMCC select HAVE_PIRQ_TABLE diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb index 00ed4eca84..efa0d88216 100644 --- a/src/mainboard/intel/xe7501devkit/devicetree.cb +++ b/src/mainboard/intel/xe7501devkit/devicetree.cb @@ -20,7 +20,7 @@ chip northbridge/intel/e7501 end end device pci 6.0 on end # E7501 Power management registers? (undocumented) - chip southbridge/intel/i82801ca + chip southbridge/intel/i82801cx device pci 1d.0 off end # USB (might not work, Southbridge code needs looking at) device pci 1d.1 off end # USB (not populated) device pci 1d.2 off end # USB (not populated) diff --git a/src/mainboard/intel/xe7501devkit/failover.c b/src/mainboard/intel/xe7501devkit/failover.c index 7aa9e405ed..9daf3b27d6 100644 --- a/src/mainboard/intel/xe7501devkit/failover.c +++ b/src/mainboard/intel/xe7501devkit/failover.c @@ -7,7 +7,7 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "pc80/mc146818rtc_early.c" -#include "southbridge/intel/i82801ca/cmos_failover.c" +#include "southbridge/intel/i82801cx/cmos_failover.c" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/intel/e7501/reset_test.c" diff --git a/src/mainboard/intel/xe7501devkit/reset.c b/src/mainboard/intel/xe7501devkit/reset.c index 8feaac64e5..7c8a729f5e 100644 --- a/src/mainboard/intel/xe7501devkit/reset.c +++ b/src/mainboard/intel/xe7501devkit/reset.c @@ -1,6 +1,6 @@ -void i82801ca_hard_reset(void); +void i82801cx_hard_reset(void); void hard_reset(void) { - i82801ca_hard_reset(); + i82801cx_hard_reset(); } diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c index 7269fa8d43..0bedaf9431 100644 --- a/src/mainboard/intel/xe7501devkit/romstage.c +++ b/src/mainboard/intel/xe7501devkit/romstage.c @@ -14,7 +14,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" -#include "southbridge/intel/i82801ca/i82801ca_early_smbus.c" +#include "southbridge/intel/i82801cx/i82801cx_early_smbus.c" #include "northbridge/intel/e7501/raminit.h" #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/intel/e7501/debug.c" |