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-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb40
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb40
2 files changed, 28 insertions, 52 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
index c2dde4f526..00b20ba3f7 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
@@ -59,20 +59,20 @@ chip soc/intel/skylake
# Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled
register "SerialIrqConfigSirqEnable" = "0x01"
- # VR Settings Configuration for 5 Domains
- #+----------------+-------+-------+-------------+-------------+-------+
- #| Domain/Setting | SA | IA | Ring Sliced | GT Unsliced | GT |
- #+----------------+-------+-------+-------------+-------------+-------+
- #| Psi1Threshold | 20A | 20A | 20A | 20A | 20A |
- #| Psi2Threshold | 5A | 5A | 5A | 5A | 5A |
- #| Psi3Threshold | 1A | 1A | 1A | 1A | 1A |
- #| Psi3Enable | 1 | 1 | 1 | 1 | 1 |
- #| Psi4Enable | 1 | 1 | 1 | 1 | 1 |
- #| ImonSlope | 0 | 0 | 0 | 0 | 0 |
- #| ImonOffset | 0 | 0 | 0 | 0 | 0 |
- #| IccMax | 7A | 34A | 34A | 35A | 35A |
- #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | 1.52V |
- #+----------------+-------+-------+-------------+-------------+-------+
+ # VR Settings Configuration for 4 Domains
+ #+----------------+-------+-------+-------+-------+
+ #| Domain/Setting | SA | IA | GTUS | GTS |
+ #+----------------+-------+-------+-------+-------+
+ #| Psi1Threshold | 20A | 20A | 20A | 20A |
+ #| Psi2Threshold | 5A | 5A | 5A | 5A |
+ #| Psi3Threshold | 1A | 1A | 1A | 1A |
+ #| Psi3Enable | 1 | 1 | 1 | 1 |
+ #| Psi4Enable | 1 | 1 | 1 | 1 |
+ #| ImonSlope | 0 | 0 | 0 | 0 |
+ #| ImonOffset | 0 | 0 | 0 | 0 |
+ #| IccMax | 7A | 34A | 35A | 35A |
+ #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
+ #+----------------+-------+-------+-------+-------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1, \
.psi1threshold = 0x50, \
@@ -98,18 +98,6 @@ chip soc/intel/skylake
.icc_max = 0x88, \
.voltage_limit = 0x5F0 \
}"
- register "domain_vr_config[VR_RING]" = "{
- .vr_config_enable = 1, \
- .psi1threshold = 0x50, \
- .psi2threshold = 0x14, \
- .psi3threshold = 0x4, \
- .psi3enable = 1, \
- .psi4enable = 1, \
- .imon_slope = 0x0, \
- .imon_offset = 0x0, \
- .icc_max = 0x88, \
- .voltage_limit = 0x5F0, \
- }"
register "domain_vr_config[VR_GT_UNSLICED]" = "{
.vr_config_enable = 1, \
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
index e79c046b8f..369629263b 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
@@ -65,20 +65,20 @@ chip soc/intel/skylake
# Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled
register "SerialIrqConfigSirqEnable" = "0x01"
- # VR Settings Configuration for 5 Domains
- #+----------------+-------+-------+-------------+-------------+-------+
- #| Domain/Setting | SA | IA | Ring Sliced | GT Unsliced | GT |
- #+----------------+-------+-------+-------------+-------------+-------+
- #| Psi1Threshold | 20A | 20A | 20A | 20A | 20A |
- #| Psi2Threshold | 4A | 5A | 5A | 5A | 5A |
- #| Psi3Threshold | 1A | 1A | 1A | 1A | 1A |
- #| Psi3Enable | 1 | 1 | 1 | 1 | 1 |
- #| Psi4Enable | 1 | 1 | 1 | 1 | 1 |
- #| ImonSlope | 0 | 0 | 0 | 0 | 0 |
- #| ImonOffset | 0 | 0 | 0 | 0 | 0 |
- #| IccMax | 7A | 34A | 34A | 35A | 35A |
- #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | 1.52V |
- #+----------------+-------+-------+-------------+-------------+-------+
+ # VR Settings Configuration for 4 Domains
+ #+----------------+-------+-------+-------+-------+
+ #| Domain/Setting | SA | IA | GTUS | GTS |
+ #+----------------+-------+-------+-------+-------+
+ #| Psi1Threshold | 20A | 20A | 20A | 20A |
+ #| Psi2Threshold | 4A | 5A | 5A | 5A |
+ #| Psi3Threshold | 1A | 1A | 1A | 1A |
+ #| Psi3Enable | 1 | 1 | 1 | 1 |
+ #| Psi4Enable | 1 | 1 | 1 | 1 |
+ #| ImonSlope | 0 | 0 | 0 | 0 |
+ #| ImonOffset | 0 | 0 | 0 | 0 |
+ #| IccMax | 7A | 34A | 35A | 35A |
+ #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
+ #+----------------+-------+-------+-------+-------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1, \
.psi1threshold = 0x50, \
@@ -104,18 +104,6 @@ chip soc/intel/skylake
.icc_max = 0x0, \
.voltage_limit = 0x0 \
}"
- register "domain_vr_config[VR_RING]" = "{
- .vr_config_enable = 1, \
- .psi1threshold = 0x50, \
- .psi2threshold = 0x14, \
- .psi3threshold = 0x4, \
- .psi3enable = 1, \
- .psi4enable = 1, \
- .imon_slope = 0x0, \
- .imon_offset = 0x0, \
- .icc_max = 0x0, \
- .voltage_limit = 0x0, \
- }"
register "domain_vr_config[VR_GT_UNSLICED]" = "{
.vr_config_enable = 1, \