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-rw-r--r--src/mainboard/intel/cannonlake_rvp/Kconfig35
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Kconfig.name2
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Makefile.inc1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/board_info.txt6
-rw-r--r--src/mainboard/intel/cannonlake_rvp/devicetree.cb9
-rw-r--r--src/mainboard/intel/cannonlake_rvp/romstage.c17
6 files changed, 70 insertions, 0 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig
new file mode 100644
index 0000000000..54cd3f6a95
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig
@@ -0,0 +1,35 @@
+if BOARD_INTEL_CANNONLAKE_RVP
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select BOARD_ROMSIZE_KB_16384
+ select SOC_INTEL_CANNONLAKE
+
+config MAINBOARD_DIR
+ string
+ default "intel/cannonlake_rvp"
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Cannonlake RVP"
+
+config MAINBOARD_VENDOR
+ string
+ default "Intel"
+
+config IFD_BIN_PATH
+ string
+ depends on HAVE_IFD_BIN
+ default "3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)/descriptor.bin"
+
+config ME_BIN_PATH
+ string
+ depends on HAVE_ME_BIN
+ default "3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)/me.bin"
+
+config EC_BIN_PATH
+ string
+ depends on HAVE_EC_BIN
+ default "3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)/ec.bin"
+
+endif
diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig.name b/src/mainboard/intel/cannonlake_rvp/Kconfig.name
new file mode 100644
index 0000000000..4935603cd0
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_INTEL_CANNONLAKE_RVP
+ bool "Cannonlake DDR4 RVP"
diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
new file mode 100644
index 0000000000..75c34ddc52
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
@@ -0,0 +1 @@
+#Nothing here yet
diff --git a/src/mainboard/intel/cannonlake_rvp/board_info.txt b/src/mainboard/intel/cannonlake_rvp/board_info.txt
new file mode 100644
index 0000000000..2fe64680dd
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/board_info.txt
@@ -0,0 +1,6 @@
+Vendor name: Intel
+Board name: Cannonlake rvp
+Category: eval
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
diff --git a/src/mainboard/intel/cannonlake_rvp/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/devicetree.cb
new file mode 100644
index 0000000000..c7001a4118
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/devicetree.cb
@@ -0,0 +1,9 @@
+chip soc/intel/cannonlake
+
+ device cpu_cluster 0 on
+ device lapic 0 on end
+ end
+
+ device domain 0 on
+ end
+end
diff --git a/src/mainboard/intel/cannonlake_rvp/romstage.c b/src/mainboard/intel/cannonlake_rvp/romstage.c
new file mode 100644
index 0000000000..1f58c2caa3
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/romstage.c
@@ -0,0 +1,17 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ * Copyright (C) 2017 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+//Nothing here yet, but file needed for build.