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-rw-r--r--src/mainboard/intel/d945gclf/devicetree.cb2
-rw-r--r--src/mainboard/intel/d945gclf/fadt.c28
2 files changed, 2 insertions, 28 deletions
diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb
index d389d8af14..2a3172b12c 100644
--- a/src/mainboard/intel/d945gclf/devicetree.cb
+++ b/src/mainboard/intel/d945gclf/devicetree.cb
@@ -53,6 +53,8 @@ chip northbridge/intel/i945
register "ide_enable_primary" = "0x1"
register "ide_enable_secondary" = "0x0"
register "sata_ahci" = "0x0"
+ register "c3_latency" = "85"
+ register "p_cnt_throttling_supported" = "0"
device pci 1b.0 on end # High Definition Audio
device pci 1c.0 on end # PCIe
diff --git a/src/mainboard/intel/d945gclf/fadt.c b/src/mainboard/intel/d945gclf/fadt.c
deleted file mode 100644
index 74a0e7e929..0000000000
--- a/src/mainboard/intel/d945gclf/fadt.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/acpi.h>
-
-void mainboard_fill_fadt(acpi_fadt_t * fadt)
-{
- fadt->p_lvl3_lat = 85;
- fadt->duty_width = 0;
- fadt->iapc_boot_arch = 0x03;
- fadt->flags |= ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_PLATFORM_CLOCK;
-}