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-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb1
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb1
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb1
-rw-r--r--src/mainboard/intel/saddlebrook/devicetree.cb1
4 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
index fa502834af..b5979fc8a8 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
@@ -84,7 +84,6 @@ chip soc/intel/skylake
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
- register "EnableSata" = "1"
register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{ \
[0] = 1, \
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
index 07d7385943..e6c5c38d73 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb
@@ -1,7 +1,6 @@
chip soc/intel/skylake
# SATA port 0
- register "EnableSata" = "1"
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1"
register "SataPortsEnable[2]" = "1"
diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
index 91abfe6f03..cd3298fb0c 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
@@ -127,7 +127,6 @@ chip soc/intel/skylake
register "SsicPortEnable" = "1" # Enable SSIC for WWAN
- register "EnableSata" = "1"
register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{ \
[0] = 1, \
diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb
index d3ca269492..71102791a6 100644
--- a/src/mainboard/intel/saddlebrook/devicetree.cb
+++ b/src/mainboard/intel/saddlebrook/devicetree.cb
@@ -175,7 +175,6 @@ chip soc/intel/skylake
# Must leave UART0 enabled or SD/eMMC will not work as PCI
- register "EnableSata" = "1"
register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{ \
[0] = 1, \