diff options
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/baskingridge/chromeos.fmd | 37 | ||||
-rw-r--r-- | src/mainboard/intel/bayleybay_fsp/chromeos.fmd | 37 | ||||
-rw-r--r-- | src/mainboard/intel/kunimitsu/chromeos.fmd | 38 | ||||
-rw-r--r-- | src/mainboard/intel/sklrvp/chromeos.fmd | 37 | ||||
-rw-r--r-- | src/mainboard/intel/strago/chromeos.fmd | 38 | ||||
-rw-r--r-- | src/mainboard/intel/wtm2/chromeos.fmd | 37 |
6 files changed, 224 insertions, 0 deletions
diff --git a/src/mainboard/intel/baskingridge/chromeos.fmd b/src/mainboard/intel/baskingridge/chromeos.fmd new file mode 100644 index 0000000000..5ac32447ec --- /dev/null +++ b/src/mainboard/intel/baskingridge/chromeos.fmd @@ -0,0 +1,37 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x180000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x17f000 + } + SI_BIOS@0x180000 0x680000 { + RW_VPD@0x0 0x1000 + RW_UNUSED@0x1000 0x67000 + RW_SHARED@0x68000 0x18000 { + RW_ENVIRONMENT@0x0 0x4000 + RW_MRC_CACHE@0x4000 0x10000 + DEV_CFG@0x14000 0x4000 + } + RW_SECTION_A@0x80000 0x100000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0x7ffc0 + RW_FWID_A@0x8ffc0 0x40 + RW_UNUSED_A@0x90000 0x70000 + } + RW_SECTION_B@0x180000 0x100000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0x7ffc0 + RW_FWID_B@0x8ffc0 0x40 + RW_UNUSED_B@0x90000 0x70000 + } + RO_UNUSED_1@0x280000 0x170000 + RO_VPD@0x3f0000 0x20000 + RO_UNUSED_2@0x410000 0xe0000 + RO_SECTION@0x4f0000 0x190000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_PADDING@0x840 0xf7c0 + GBB@0x10000 0x80000 + COREBOOT(CBFS)@0x90000 0x100000 + } + } +} diff --git a/src/mainboard/intel/bayleybay_fsp/chromeos.fmd b/src/mainboard/intel/bayleybay_fsp/chromeos.fmd new file mode 100644 index 0000000000..913bf97291 --- /dev/null +++ b/src/mainboard/intel/bayleybay_fsp/chromeos.fmd @@ -0,0 +1,37 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x300000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x2ff000 + } + SI_BIOS@0x300000 0x500000 { + RW_SECTION_A@0x0 0xf0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0xc0000 + RW_FWID_A@0xeffc0 0x40 + } + RW_SECTION_B@0xf0000 0xf0000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0xc0000 + RW_FWID_B@0xeffc0 0x40 + } + RW_MRC_CACHE@0x1e0000 0x10000 + RW_ELOG@0x1f0000 0x4000 + RW_SHARED@0x1f4000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x1f8000 0x2000 + RW_UNUSED@0x1fa000 0x106000 + WP_RO@0x300000 0x200000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x1f0000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x100000 + } + } + } +} diff --git a/src/mainboard/intel/kunimitsu/chromeos.fmd b/src/mainboard/intel/kunimitsu/chromeos.fmd new file mode 100644 index 0000000000..5a8504ed3d --- /dev/null +++ b/src/mainboard/intel/kunimitsu/chromeos.fmd @@ -0,0 +1,38 @@ +FLASH@0xff000000 0x1000000 { + SI_ALL@0x0 0x200000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x1ff000 + } + SI_BIOS@0x200000 0xe00000 { + RW_SECTION_A@0x0 0x3f0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0x3dffc0 + RW_FWID_A@0x3effc0 0x40 + } + RW_SECTION_B@0x3f0000 0x3f0000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0x3dffc0 + RW_FWID_B@0x3effc0 0x40 + } + RW_MRC_CACHE@0x7e0000 0x10000 + RW_ELOG@0x7f0000 0x4000 + RW_SHARED@0x7f4000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x7f8000 0x2000 + RW_NVRAM@0x7fa000 0x6000 + RW_LEGACY@0x800000 0x200000 + WP_RO@0xa00000 0x400000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x3f0000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x300000 + } + } + } +} diff --git a/src/mainboard/intel/sklrvp/chromeos.fmd b/src/mainboard/intel/sklrvp/chromeos.fmd new file mode 100644 index 0000000000..f1b9342b53 --- /dev/null +++ b/src/mainboard/intel/sklrvp/chromeos.fmd @@ -0,0 +1,37 @@ +FLASH@0xff000000 0x1000000 { + SI_ALL@0x0 0xa00000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x1ff000 + } + SI_BIOS@0xa00000 0x600000 { + RW_SECTION_A@0x0 0x100000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0xeffc0 + RW_FWID_A@0xfffc0 0x40 + } + RW_SECTION_B@0x100000 0x100000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0xeffc0 + RW_FWID_B@0xfffc0 0x40 + } + RW_MRC_CACHE@0x200000 0x10000 + RW_ELOG@0x210000 0x4000 + RW_SHARED@0x214000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x218000 0x2000 + RW_UNUSED@0x21a000 0x6000 + WP_RO@0x300000 0x300000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x1f0000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x200000 + } + } + } +} diff --git a/src/mainboard/intel/strago/chromeos.fmd b/src/mainboard/intel/strago/chromeos.fmd new file mode 100644 index 0000000000..21b39c0e21 --- /dev/null +++ b/src/mainboard/intel/strago/chromeos.fmd @@ -0,0 +1,38 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x200000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x1ff000 + } + SI_BIOS@0x200000 0x600000 { + RW_SECTION_A@0x0 0xf0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0xdffc0 + RW_FWID_A@0xeffc0 0x40 + } + RW_SECTION_B@0xf0000 0xf0000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0xdffc0 + RW_FWID_B@0xeffc0 0x40 + } + RW_MRC_CACHE@0x1e0000 0x10000 + RW_ELOG@0x1f0000 0x4000 + RW_SHARED@0x1f4000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x1f8000 0x2000 + RW_UNUSED@0x1fa000 0x6000 + RW_LEGACY@0x200000 0x200000 + WP_RO@0x400000 0x200000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x1f0000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x100000 + } + } + } +} diff --git a/src/mainboard/intel/wtm2/chromeos.fmd b/src/mainboard/intel/wtm2/chromeos.fmd new file mode 100644 index 0000000000..5ac32447ec --- /dev/null +++ b/src/mainboard/intel/wtm2/chromeos.fmd @@ -0,0 +1,37 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x180000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x17f000 + } + SI_BIOS@0x180000 0x680000 { + RW_VPD@0x0 0x1000 + RW_UNUSED@0x1000 0x67000 + RW_SHARED@0x68000 0x18000 { + RW_ENVIRONMENT@0x0 0x4000 + RW_MRC_CACHE@0x4000 0x10000 + DEV_CFG@0x14000 0x4000 + } + RW_SECTION_A@0x80000 0x100000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0x7ffc0 + RW_FWID_A@0x8ffc0 0x40 + RW_UNUSED_A@0x90000 0x70000 + } + RW_SECTION_B@0x180000 0x100000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0x7ffc0 + RW_FWID_B@0x8ffc0 0x40 + RW_UNUSED_B@0x90000 0x70000 + } + RO_UNUSED_1@0x280000 0x170000 + RO_VPD@0x3f0000 0x20000 + RO_UNUSED_2@0x410000 0xe0000 + RO_SECTION@0x4f0000 0x190000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_PADDING@0x840 0xf7c0 + GBB@0x10000 0x80000 + COREBOOT(CBFS)@0x90000 0x100000 + } + } +} |