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-rw-r--r--src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb
index e30da3af4d..429d5daca8 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb
+++ b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb
@@ -9,6 +9,19 @@ chip soc/intel/cannonlake
register "ScsEmmcHs400Enabled" = "1"
register "HeciEnabled" = "1"
+ # Enable eDP device
+ register "DdiPortEdp" = "1"
+ # Enable HPD for DDI ports B/C/D/F
+ register "DdiPortBHpd" = "1"
+ register "DdiPortCHpd" = "1"
+ register "DdiPortDHpd" = "1"
+ register "DdiPortFHpd" = "1"
+ # Enable DDC for DDI ports B/C/D/F
+ register "DdiPortBDdc" = "1"
+ register "DdiPortCDdc" = "1"
+ register "DdiPortDDdc" = "1"
+ register "DdiPortFDdc" = "1"
+
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"
register "usb2_ports[1]" = "USB2_PORT_MID(OC0)"
register "usb2_ports[2]" = "USB2_PORT_MID(OC0)"