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-rw-r--r--src/mainboard/intel/d945gclf/Kconfig1
-rw-r--r--src/mainboard/intel/d945gclf/romstage.c8
2 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index 0a9de1a1a0..b676eb69b1 100644
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
+ select EARLY_CBMEM_INIT
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_512
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 248aa3bf17..166743f552 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -26,6 +26,7 @@
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <lib.h>
+#include <cbmem.h>
#include "superio/smsc/lpc47m15x/lpc47m15x.h"
#include <pc80/mc146818rtc.h>
#include <console/console.h>
@@ -182,12 +183,11 @@ static void early_ich7_init(void)
RCBA32(0x2034) = reg32;
}
-#include <cbmem.h>
-
void main(unsigned long bist)
{
u32 reg32;
int boot_mode = 0;
+ int cbmem_was_initted;
if (bist == 0)
enable_lapic();
@@ -269,11 +269,13 @@ void main(unsigned long bist)
MCHBAR16(SSKPD) = 0xCAFE;
+ cbmem_was_initted = !cbmem_initialize();
+
#if CONFIG_HAVE_ACPI_RESUME
/* If there is no high memory area, we didn't boot before, so
* this is not a resume. In that case we just create the cbmem toc.
*/
- if ((boot_mode == 2) && cbmem_reinit()) {
+ if ((boot_mode == 2) && cbmem_was_initted) {
void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
/* copy 1MB - 64K to high tables ram_base to prevent memory corruption