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-rw-r--r--src/mainboard/intel/bayleybay_fsp/devicetree.cb1
-rw-r--r--src/mainboard/intel/minnowmax/devicetree.cb1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/intel/bayleybay_fsp/devicetree.cb b/src/mainboard/intel/bayleybay_fsp/devicetree.cb
index a19a676804..521fd122f6 100644
--- a/src/mainboard/intel/bayleybay_fsp/devicetree.cb
+++ b/src/mainboard/intel/bayleybay_fsp/devicetree.cb
@@ -27,7 +27,6 @@ chip soc/intel/fsp_baytrail
register "PcdSataMode" = "SATA_MODE_AHCI"
register "PcdMrcInitSPDAddr1" = "SPD_ADDR_DEFAULT"
register "PcdMrcInitSPDAddr2" = "SPD_ADDR_DEFAULT"
- register "PcdMrcInitTsegSize" = "TSEG_SIZE_8_MB"
register "PcdMrcInitMmioSize" = "MMIO_SIZE_DEFAULT"
register "PcdeMMCBootMode" = "EMMC_FOLLOWS_DEVICETREE"
register "PcdIgdDvmt50PreAlloc" = "IGD_MEMSIZE_DEFAULT"
diff --git a/src/mainboard/intel/minnowmax/devicetree.cb b/src/mainboard/intel/minnowmax/devicetree.cb
index ae11d6a020..72849d6dfd 100644
--- a/src/mainboard/intel/minnowmax/devicetree.cb
+++ b/src/mainboard/intel/minnowmax/devicetree.cb
@@ -28,7 +28,6 @@ chip soc/intel/fsp_baytrail
register "PcdSataMode" = "SATA_MODE_AHCI"
register "PcdMrcInitSPDAddr1" = "SPD_ADDR_DEFAULT"
register "PcdMrcInitSPDAddr2" = "SPD_ADDR_DEFAULT"
- register "PcdMrcInitTsegSize" = "TSEG_SIZE_8_MB"
register "PcdMrcInitMmioSize" = "MMIO_SIZE_DEFAULT"
register "PcdeMMCBootMode" = "EMMC_FOLLOWS_DEVICETREE"
register "PcdIgdDvmt50PreAlloc" = "IGD_MEMSIZE_DEFAULT"