7 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/intel/d945gclf/acpi_tables.c b/src/mainboard/intel/d945gclf/acpi_tables.c
index 9fc2adbc7c..1e8ea292fc 100644
--- a/src/mainboard/intel/d945gclf/acpi_tables.c
+++ b/src/mainboard/intel/d945gclf/acpi_tables.c
@@ -66,7 +66,7 @@ typedef struct acpi_oemb {
 } __attribute__((packed)) acpi_oemb_t;
 #endif
 
-#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/nvs.h"
 
 #if OLD_ACPI
 static void acpi_create_oemb(acpi_oemb_t *oemb)
diff --git a/src/mainboard/intel/d945gclf/mainboard_smi.c b/src/mainboard/intel/d945gclf/mainboard_smi.c
index 8dff64e8fa..dbd1a81a64 100644
--- a/src/mainboard/intel/d945gclf/mainboard_smi.c
+++ b/src/mainboard/intel/d945gclf/mainboard_smi.c
@@ -21,7 +21,7 @@
 #include <arch/romcc_io.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
-#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/nvs.h"
 
 /* The southbridge SMI handler checks whether gnvs has a
  * valid pointer before calling the trap handler
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 8f8cd0f00f..e91fcd052d 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -31,8 +31,8 @@
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/acpi.h>
-#include "southbridge/intel/i3100/i3100_early_smbus.c"
-#include "southbridge/intel/i3100/i3100_early_lpc.c"
+#include "southbridge/intel/i3100/early_smbus.c"
+#include "southbridge/intel/i3100/early_lpc.c"
 #include "reset.c"
 #include "superio/intel/i3100/i3100_early_serial.c"
 #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index e3ab67940e..8ce1cd24da 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -6,7 +6,7 @@
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
 #include <console/console.h>
-#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
+#include "southbridge/intel/i82801ex/early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
 #include "superio/nsc/pc87427/pc87427.h"
 #include "cpu/x86/lapic/boot_cpu.c"
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 856c69950d..e397eaefb7 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -27,8 +27,8 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include "southbridge/intel/i3100/i3100_early_smbus.c"
-#include "southbridge/intel/i3100/i3100_early_lpc.c"
+#include "southbridge/intel/i3100/early_smbus.c"
+#include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit.h"
 #include "superio/intel/i3100/i3100.h"
 #include "cpu/x86/mtrr/earlymtrr.c"
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index d6ee7c582f..6d29c57c75 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -28,8 +28,8 @@
 #include <pc80/mc146818rtc.h>
 #include "pc80/udelay_io.c"
 #include <console/console.h>
-#include "southbridge/intel/i3100/i3100_early_smbus.c"
-#include "southbridge/intel/i3100/i3100_early_lpc.c"
+#include "southbridge/intel/i3100/early_smbus.c"
+#include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit_ep80579.h"
 #include "superio/intel/i3100/i3100.h"
 #include "cpu/x86/lapic/boot_cpu.c"
diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c
index e6fb83f4a6..d594091752 100644
--- a/src/mainboard/intel/xe7501devkit/romstage.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
@@ -8,7 +8,7 @@
 #include <stdlib.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
+#include "southbridge/intel/i82801cx/early_smbus.c"
 #include "northbridge/intel/e7501/raminit.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/intel/e7501/debug.c"