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-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 5009829c1f..070fb0700c 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -1,7 +1,3 @@
-#if CONFIG_K8_REV_F_SUPPORT
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -98,9 +94,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
-#if CONFIG_MEM_TRAIN_SEQ == 1
- set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
-#endif
setup_coherent_ht_domain(); // routing table and start other core0
wait_all_core0_started();