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-rw-r--r--src/mainboard/jetway/pa78vm5/mainboard.c5
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c5
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c
index 188cadf3d5..6d0ceba31e 100644
--- a/src/mainboard/jetway/pa78vm5/mainboard.c
+++ b/src/mainboard/jetway/pa78vm5/mainboard.c
@@ -26,11 +26,10 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
-#include <southbridge/amd/sb700/sb700.h>
+#include "southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/smbus.h"
#include "chip.h"
-#define SMBUS_IO_BASE 0x6000
-
uint64_t uma_memory_base, uma_memory_size;
void set_pcie_dereset(void);
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index 4ffcadebec..11bda6a600 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -49,7 +49,8 @@
#include <cpu/amd/mtrr.h>
#include "northbridge/amd/amdfam10/setup_resource_map.c"
#include "southbridge/amd/rs780/early_setup.c"
-#include "southbridge/amd/sb700/early_setup.c"
+#include "southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/smbus.h"
#include "northbridge/amd/amdfam10/debug.c"
#if CONFIG_TTYS0_BASE == 0x2f8
@@ -62,7 +63,7 @@ static void activate_spd_rom(const struct mem_controller *ctrl) { }
static int spd_read_byte(u32 device, u32 address)
{
- return smbus_read_byte(device, address);
+ return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
}
#include "northbridge/amd/amdfam10/amdfam10.h"