summaryrefslogtreecommitdiff
path: root/src/mainboard/jetway
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r--src/mainboard/jetway/j7f24/romstage.c2
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c
index ee2dd97772..1fa2f0857b 100644
--- a/src/mainboard/jetway/j7f24/romstage.c
+++ b/src/mainboard/jetway/j7f24/romstage.c
@@ -27,13 +27,13 @@
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <console/console.h>
-#include "lib/ramtest.c"
#include "northbridge/via/cn700/raminit.h"
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "superio/fintek/f71805f/f71805f_early_serial.c"
+#include <lib.h>
#if CONFIG_TTYS0_BASE == 0x2f8
#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP2)
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index f96797d8c0..fc18ba9887 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -46,10 +46,10 @@
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
-#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "northbridge/amd/amdfam10/raminit.h"
#include "northbridge/amd/amdfam10/amdfam10.h"
+#include <lib.h>
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdfam10/reset_test.c"