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-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/romstage.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
index 534bdc44bf..d7fa6bcfcb 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
@@ -76,6 +76,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
__writemsr (0xc0010062, 0);
+ agesawrapper_amdinitmmio();
+
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30);
sb_Poweron_Init();
@@ -94,9 +96,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
- post_code(0x35);
- agesawrapper_amdinitmmio();
-
post_code(0x37);
agesawrapper_amdinitreset();