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-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
index bacb7b11aa..9c8d0f6e47 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
@@ -37,13 +37,13 @@
* @brief bit[0-6] used to control USB
* 0 - Disable
* 1 - Enable
- * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is define at BIT0
- * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is define at BIT1
- * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is define at BIT2
- * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is define at BIT3
- * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is define at BIT4
- * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is define at BIT5
- * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is define at BIT6
+ * Usb Ohci1 Controller (Bus 0 Dev 18 Func0) is defined at BIT0
+ * Usb Ehci1 Controller (Bus 0 Dev 18 Func2) is defined at BIT1
+ * Usb Ohci2 Controller (Bus 0 Dev 19 Func0) is defined at BIT2
+ * Usb Ehci2 Controller (Bus 0 Dev 19 Func2) is defined at BIT3
+ * Usb Ohci3 Controller (Bus 0 Dev 22 Func0) is defined at BIT4
+ * Usb Ehci3 Controller (Bus 0 Dev 22 Func2) is defined at BIT5
+ * Usb Ohci4 Controller (Bus 0 Dev 20 Func5) is defined at BIT6
*/
#define USB_CONFIG 0x7F
@@ -140,13 +140,13 @@
/**
* @def AZALIA_SDIN_PIN
* @brief
- * SDIN0 is define at BIT0 & BIT1
+ * SDIN0 is defined at BIT0 & BIT1
* 00 - GPIO PIN
* 01 - Reserved
* 10 - As a Azalia SDIN pin
- * SDIN1 is define at BIT2 & BIT3
- * SDIN2 is define at BIT4 & BIT5
- * SDIN3 is define at BIT6 & BIT7
+ * SDIN1 is defined at BIT2 & BIT3
+ * SDIN2 is defined at BIT4 & BIT5
+ * SDIN3 is defined at BIT6 & BIT7
*/
//#define AZALIA_SDIN_PIN 0xAA
#define AZALIA_SDIN_PIN 0x2A