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-rw-r--r--src/mainboard/jetway/j7f24/romstage.c2
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c
index 401fe67617..b4e4413e0f 100644
--- a/src/mainboard/jetway/j7f24/romstage.c
+++ b/src/mainboard/jetway/j7f24/romstage.c
@@ -32,7 +32,7 @@
#include "pc80/udelay_io.c"
#include "lib/delay.c"
#include "southbridge/via/vt8237r/early_smbus.c"
-#include "superio/fintek/f71805f/f71805f_early_serial.c"
+#include "superio/fintek/f71805f/early_serial.c"
#include <lib.h>
#include <spd.h>
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index b5b9ab3d4b..02c34b9148 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -43,7 +43,7 @@
#include "northbridge/amd/amdfam10/reset_test.c"
#include <console/loglevel.h>
#include "cpu/x86/bist.h"
-#include "superio/fintek/f71863fg/f71863fg_early_serial.c"
+#include "superio/fintek/f71863fg/early_serial.c"
#include <usbdebug.h>
#include "cpu/x86/mtrr/earlymtrr.c"
#include <cpu/amd/mtrr.h>
@@ -67,7 +67,7 @@ static int spd_read_byte(u32 device, u32 address)
#include "northbridge/amd/amdfam10/amdfam10.h"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
-#include "northbridge/amd/amdfam10/amdfam10_pci.c"
+#include "northbridge/amd/amdfam10/pci.c"
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#include "cpu/amd/car/post_cache_as_ram.c"