4 files changed, 6 insertions, 10 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/Kconfig b/src/mainboard/jetway/nf81-t56n-lf/Kconfig
index dfa01b93a6..d2dda6725f 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/Kconfig
+++ b/src/mainboard/jetway/nf81-t56n-lf/Kconfig
@@ -14,14 +14,10 @@
 # GNU General Public License for more details.
 #
 
-config BOARD_JETWAY_NF81_T56N_LF
-	def_bool n
-
 if BOARD_JETWAY_NF81_T56N_LF
 
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
-	#select ROMCC_BOOTBLOCK
 	select CPU_AMD_AGESA_FAMILY14
 	select NORTHBRIDGE_AMD_AGESA_FAMILY14
 	select SOUTHBRIDGE_AMD_CIMX_SB800
diff --git a/src/mainboard/jetway/nf81-t56n-lf/Kconfig.name b/src/mainboard/jetway/nf81-t56n-lf/Kconfig.name
index 0b676274ae..2e660f937c 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/Kconfig.name
+++ b/src/mainboard/jetway/nf81-t56n-lf/Kconfig.name
@@ -1,2 +1,2 @@
-#config BOARD_JETWAY_NF81_T56N_LF
-#	bool"NF81_T56N_LF"
+config BOARD_JETWAY_NF81_T56N_LF
+	bool "NF81_T56N_LF"
diff --git a/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc b/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc
index ba56286636..bf86007cec 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc
+++ b/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc
@@ -20,6 +20,8 @@ pci$(stripped_ahcibios_id).rom-file := $(call strip_quotes,$(CONFIG_AHCI_BIOS_FI
 pci$(stripped_ahcibios_id).rom-type := optionrom
 endif
 
+bootblock-y += bootblock.c
+
 romstage-y += buildOpts.c
 romstage-y += BiosCallOuts.c
 romstage-y += OemCustomize.c
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/bootblock.c
index 5e61bddfcc..5ecfaf74f8 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/bootblock.c
@@ -14,16 +14,14 @@
  * GNU General Public License for more details.
  */
 
-#include <northbridge/amd/agesa/state_machine.h>
+#include <bootblock_common.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f71869ad/f71869ad.h>
-#include <sb_cimx.h>
 
 /* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */
 #define SERIAL_DEV PNP_DEV(0x2e, F71869AD_SP1)
 
-void board_BeforeAgesa(struct sysinfo *cb)
+void bootblock_mainboard_early_init(void)
 {
-	sb_Poweron_Init();
 	fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }