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-rw-r--r--src/mainboard/lenovo/t420/Kconfig1
-rw-r--r--src/mainboard/lenovo/t420/devicetree.cb14
-rw-r--r--src/mainboard/lenovo/t420/romstage.c28
3 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t420/Kconfig b/src/mainboard/lenovo/t420/Kconfig
index 784d38a303..c0b475270f 100644
--- a/src/mainboard/lenovo/t420/Kconfig
+++ b/src/mainboard/lenovo/t420/Kconfig
@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_LIBGFXINIT
select GFX_GMA_INTERNAL_IS_LVDS
+ select DRIVERS_LENOVO_HYBRID_GRAPHICS
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb
index deb62b7166..3b4e6ab9b5 100644
--- a/src/mainboard/lenovo/t420/devicetree.cb
+++ b/src/mainboard/lenovo/t420/devicetree.cb
@@ -162,6 +162,20 @@ chip northbridge/intel/sandybridge
register "eventd_enable" = "0xff"
register "evente_enable" = "0x0d"
end
+ chip drivers/lenovo/hybrid_graphics
+ device pnp ff.f on end # dummy
+
+ register "detect_gpio" = "21"
+
+ register "has_panel_hybrid_gpio" = "1"
+ register "panel_hybrid_gpio" = "52"
+ register "panel_integrated_lvl" = "1"
+
+ register "has_backlight_gpio" = "0"
+ register "has_dgpu_power_gpio" = "0"
+
+ register "has_thinker1" = "1"
+ end
end # LPC Controller
device pci 1f.2 on
subsystemid 0x17aa 0x21ce
diff --git a/src/mainboard/lenovo/t420/romstage.c b/src/mainboard/lenovo/t420/romstage.c
index 94b8d62504..9f178ea741 100644
--- a/src/mainboard/lenovo/t420/romstage.c
+++ b/src/mainboard/lenovo/t420/romstage.c
@@ -18,6 +18,33 @@
#include <arch/io.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
+#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <device/device.h>
+#include <device/pci.h>
+
+static void hybrid_graphics_init(void)
+{
+ bool peg, igd;
+ u32 reg32;
+
+ early_hybrid_graphics(&igd, &peg);
+
+ /* Hide disabled devices */
+ reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN);
+ reg32 &= ~(DEVEN_PEG10 | DEVEN_IGD);
+
+ if (peg)
+ reg32 |= DEVEN_PEG10;
+
+ if (igd)
+ reg32 |= DEVEN_IGD;
+ else
+ /* Disable IGD VGA decode, no GTT or GFX stolen */
+ pci_write_config16(PCI_DEV(0, 0, 0), GGC, 2);
+
+ pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32);
+}
void pch_enable_lpc(void)
{
@@ -65,6 +92,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
void mainboard_early_init(int s3resume)
{
+ hybrid_graphics_init();
}
void mainboard_config_superio(void)