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-rw-r--r--src/mainboard/lenovo/t60/romstage.c17
-rw-r--r--src/mainboard/lenovo/x60/romstage.c17
2 files changed, 0 insertions, 34 deletions
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index 9c7f62486c..1e2b72d6b7 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -302,23 +302,6 @@ void main(unsigned long bist)
/* Initialize the internal PCIe links before we go into stage2 */
i945_late_initialization();
-#if !CONFIG_HAVE_ACPI_RESUME
-#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
-#if CONFIG_DEBUG_RAM_SETUP
- sdram_dump_mchbar_registers();
-
- {
- /* This will not work if TSEG is in place! */
- u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
-
- printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
- ram_check(0x00000000, 0x000a0000);
- ram_check(0x00100000, tom);
- }
-#endif
-#endif
-#endif
-
MCHBAR16(SSKPD) = 0xCAFE;
cbmem_was_initted = !cbmem_recovery(boot_mode==2);
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
index 1d9f68b5f2..d1f8f640a2 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/romstage.c
@@ -304,23 +304,6 @@ void main(unsigned long bist)
/* Initialize the internal PCIe links before we go into stage2 */
i945_late_initialization();
-#if !CONFIG_HAVE_ACPI_RESUME
-#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
-#if CONFIG_DEBUG_RAM_SETUP
- sdram_dump_mchbar_registers();
-
- {
- /* This will not work if TSEG is in place! */
- u32 tom = pci_read_config32(PCI_DEV(0, 2, 0), 0x5c);
-
- printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
- ram_check(0x00000000, 0x000a0000);
- ram_check(0x00100000, tom);
- }
-#endif
-#endif
-#endif
-
MCHBAR16(SSKPD) = 0xCAFE;
cbmem_was_initted = !cbmem_recovery(boot_mode==2);