diff options
Diffstat (limited to 'src/mainboard/mitac/6513wu/devicetree.cb')
| -rw-r--r-- | src/mainboard/mitac/6513wu/devicetree.cb | 87 |
1 files changed, 87 insertions, 0 deletions
diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb new file mode 100644 index 0000000000..0731b2f2cd --- /dev/null +++ b/src/mainboard/mitac/6513wu/devicetree.cb @@ -0,0 +1,87 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009 Michael Gold <mgold@ncf.ca> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +chip northbridge/intel/i82810 # Northbridge + device apic_cluster 0 on # APIC cluster + chip cpu/intel/socket_PGA370 # CPU + device apic 0 on end # APIC + end + end + device pci_domain 0 on # PCI domain + device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) + chip drivers/pci/onboard + device pci 1.0 on end + register "rom_address" = "0xfff80000" # 512 KB image + end + chip southbridge/intel/i82801xx # Southbridge + register "pirqa_routing" = "0x03" + register "pirqb_routing" = "0x05" + register "pirqc_routing" = "0x09" + register "pirqd_routing" = "0x0b" + + register "ide0_enable" = "1" + register "ide1_enable" = "1" + + device pci 1e.0 on # PCI bridge + device pci 5.0 on end # Audio controller (ESS ES1988) + end + device pci 1f.0 on # ISA bridge + chip superio/smsc/smscsuperio # Super I/O (SMSC LPC47U332) + device pnp 4e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 4e.3 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + drq 0x74 = 3 + end + device pnp 4e.4 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 4e.5 on # MIDI port (MPU-401) + io 0x60 = 0x330 + irq 0x70 = 10 + end + device pnp 4e.7 on # PS/2 keyboard / mouse + io 0x60 = 0x60 # XXX: not relocatable + io 0x62 = 0x64 # XXX: not relocatable + irq 0x70 = 1 # PS/2 keyboard interrupt + irq 0x72 = 12 # PS/2 mouse interrupt + end + device pnp 4e.9 on # Game port + io 0x60 = 0x201 + end + device pnp 4e.a on # Runtime registers + io 0x60 = 0x400 + end + device pnp 4e.b off end # SMBus + end + end + device pci 1f.1 on end # IDE + device pci 1f.2 on end # USB + device pci 1f.3 on end # SMbus + device pci 1f.5 off end # Audio controller + device pci 1f.6 off end # Modem + end + end +end |