diff options
Diffstat (limited to 'src/mainboard/mitac/6513wu')
| -rw-r--r-- | src/mainboard/mitac/6513wu/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/mitac/6513wu/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/mitac/6513wu/romstage.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/mitac/6513wu/Kconfig b/src/mainboard/mitac/6513wu/Kconfig index 20559b24b0..64937ce1c5 100644 --- a/src/mainboard/mitac/6513wu/Kconfig +++ b/src/mainboard/mitac/6513wu/Kconfig @@ -23,7 +23,7 @@ config BOARD_MITAC_6513WU select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 - select SOUTHBRIDGE_INTEL_I82801XX + select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_SMSC_SMSCSUPERIO select ROMCC select HAVE_PIRQ_TABLE diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb index 0369775c07..3cba778e10 100644 --- a/src/mainboard/mitac/6513wu/devicetree.cb +++ b/src/mainboard/mitac/6513wu/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/i82810 # Northbridge device pci_domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) device pci 1.0 on end - chip southbridge/intel/i82801xx # Southbridge + chip southbridge/intel/i82801ax # Southbridge register "pirqa_routing" = "0x03" register "pirqb_routing" = "0x05" register "pirqc_routing" = "0x09" diff --git a/src/mainboard/mitac/6513wu/romstage.c b/src/mainboard/mitac/6513wu/romstage.c index 6222ea8721..daa2e9660c 100644 --- a/src/mainboard/mitac/6513wu/romstage.c +++ b/src/mainboard/mitac/6513wu/romstage.c @@ -31,7 +31,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" -#include "southbridge/intel/i82801xx/i82801xx_early_smbus.c" +#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" #include "lib/debug.c" #include "pc80/udelay_io.c" |