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Diffstat (limited to 'src/mainboard/msi/ms7135/romstage.c')
-rw-r--r--src/mainboard/msi/ms7135/romstage.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 54753b2819..66a29b9fc6 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -47,8 +47,6 @@
#include "northbridge/amd/amdk8/reset_test.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#if CONFIG_USE_FAILOVER_IMAGE == 0
-
/* Used by ck804_early_setup(). */
#define CK804_NUM 1
#define CK804_USE_NIC 1
@@ -98,8 +96,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#endif /* CONFIG_USE_FAILOVER_IMAGE */
-
#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
@@ -121,7 +117,6 @@ static void sio_setup(void)
pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0xa0, dword);
}
-#if CONFIG_USE_FAILOVER_IMAGE == 0
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
static const uint16_t spd_addr[] = {
@@ -204,4 +199,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_cache_as_ram();
}
-#endif /* CONFIG_USE_FAILOVER_IMAGE */