diff options
Diffstat (limited to 'src/mainboard/msi/ms7260')
| -rw-r--r-- | src/mainboard/msi/ms7260/ap_romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/msi/ms7260/romstage.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/msi/ms7260/ap_romstage.c b/src/mainboard/msi/ms7260/ap_romstage.c index f8ac2fec3a..246d7afc64 100644 --- a/src/mainboard/msi/ms7260/ap_romstage.c +++ b/src/mainboard/msi/ms7260/ap_romstage.c @@ -72,7 +72,7 @@ void hardwaremain(int ret_addr) */ print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); - print_debug("\r\n"); + print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 7e97a27e53..846091a969 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -190,7 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); - print_debug("\r\n"); + print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 /* In BSP so could hold all AP until sysinfo is in RAM. */ @@ -220,7 +220,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("begin msr fid, vid "); print_debug_hex32(msr.hi); print_debug_hex32(msr.lo); - print_debug("\r\n"); + print_debug("\n"); } enable_fid_change(); @@ -232,7 +232,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("end msr fid, vid "); print_debug_hex32(msr.hi); print_debug_hex32(msr.lo); - print_debug("\r\n"); + print_debug("\n"); } #endif @@ -242,7 +242,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* fidvid change will issue one LDTSTOP and the HT change will be effective too. */ if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } allow_all_aps_stop(bsp_apicid); |