diff options
Diffstat (limited to 'src/mainboard/msi/ms9185/mptable.c')
| -rw-r--r-- | src/mainboard/msi/ms9185/mptable.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/src/mainboard/msi/ms9185/mptable.c b/src/mainboard/msi/ms9185/mptable.c index 775fdc6c2d..fccb200b7a 100644 --- a/src/mainboard/msi/ms9185/mptable.c +++ b/src/mainboard/msi/ms9185/mptable.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2001 Eric W.Biederman<ebiderman@lnxi.com> + * Copyright (C) 2001 Eric W.Biederman <ebiderman@lnxi.com> * * Copyright (C) 2006 AMD * Written by Yinghai Lu <yinghailu@gmail.com> for AMD. @@ -54,7 +54,7 @@ static void *smp_write_config_table(void *v) { device_t dev = 0; struct resource *res; - for(i=0; i<3; i++) { + for(i = 0; i < 3; i++) { dev = dev_find_device(0x1166, 0x0235, dev); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); @@ -76,11 +76,11 @@ static void *smp_write_config_table(void *v) //SATA outb(0x07, 0xc00); outb(0x0f, 0xc01); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0x0e<<2)|0, m->apicid_bcm5785[0], 0xf); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0x0e << 2)|0, m->apicid_bcm5785[0], 0xf); //USB outb(0x01, 0xc00); outb(0x0a, 0xc01); - for(i=0;i<3;i++) { + for(i = 0; i < 3; i++) { smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, m->apicid_bcm5785[0], 0xa); // } @@ -94,52 +94,52 @@ static void *smp_write_config_table(void *v) if(dev) { uint32_t dword; dword = pci_read_config32(dev, 0x6c); - dword |= (1<<4); // enable interrupts + dword |= (1 << 4); // enable interrupts pci_write_config32(dev, 0x6c, dword); } } //First pci-x slot (on bcm5785) under bus_bcm5785_1:d.0 // AIC 8130 Galileo Technology... - for(i=0;i<4;i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1_1, (6<<2)|i, m->apicid_bcm5785[1], 2 + (1+i)%4); // + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1_1, (6 << 2)|i, m->apicid_bcm5785[1], 2 + (1+i)%4); // } //pci slot (on bcm5785) - for(i=0;i<4;i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (5<<2)|i, m->apicid_bcm5785[1], 8+i%4); // + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (5 << 2)|i, m->apicid_bcm5785[1], 8+i%4); // } //onboard ati - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (4<<2)|0, m->apicid_bcm5785[1], 0x1); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (4 << 2)|0, m->apicid_bcm5785[1], 0x1); //PCI-X on bcm5780 - for(i=0;i<4;i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[1], (4<<2)|i, m->apicid_bcm5785[1], 2 + (0+i)%4); // + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[1], (4 << 2)|i, m->apicid_bcm5785[1], 2 + (0+i)%4); // } //onboard Broadcom - for(i=0;i<2;i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[2], (4<<2)|i, m->apicid_bcm5785[1], 0xa + (0+i)%4); // + for(i = 0; i < 2; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[2], (4 << 2)|i, m->apicid_bcm5785[1], 0xa + (0+i)%4); // } // First PCI-E x8 - for(i=0;i<4;i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[5], (0<<2)|i, m->apicid_bcm5785[1], 0xe); // + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[5], (0 << 2)|i, m->apicid_bcm5785[1], 0xe); // } // Second PCI-E x8 - for(i=0;i<4;i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[3], (0<<2)|i, m->apicid_bcm5785[1], 0xc); // + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[3], (0 << 2)|i, m->apicid_bcm5785[1], 0xc); // } // Third PCI-E x1 - for(i=0;i<4;i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[4], (0<<2)|i, m->apicid_bcm5785[1], 0xd); // + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[4], (0 << 2)|i, m->apicid_bcm5785[1], 0xd); // } /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |