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-rw-r--r--src/mainboard/msi/ms9282/romstage.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index 942fb11989..6f24bdccfc 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -24,12 +24,6 @@
#define SET_NB_CFG_54 1
-// used by init_cpus and fidvid (disabled until someone tests this)
-// #define SET_FIDVID 1
-#define SET_FIDVID 0
-// if we want to wait for core1 done before DQS training, set it to 0
-// #define SET_FIDVID_CORE0_ONLY 1
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>