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Diffstat (limited to 'src/mainboard/msi/ms9652_fam10/romstage.c')
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index f99f50b22f..3ab04b0eeb 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -54,7 +54,6 @@ static void post_code(u8 value) {
outb(value, 0x80);
}
-#if CONFIG_USE_FAILOVER_IMAGE==0
#include "arch/i386/lib/console.c"
#if CONFIG_USBDEBUG_DIRECT
#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
@@ -68,14 +67,10 @@ static void post_code(u8 value) {
#include "northbridge/amd/amdfam10/raminit.h"
#include "northbridge/amd/amdfam10/amdfam10.h"
-#endif
-
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdfam10/reset_test.c"
#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c"
-#if CONFIG_USE_FAILOVER_IMAGE==0
-
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdfam10/debug.c"
@@ -143,8 +138,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_10xxx/fidvid.c"
-#endif
-
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdfam10/early_ht.c"
@@ -163,7 +156,6 @@ static void sio_setup(void)
pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
}
-#if CONFIG_USE_FAILOVER_IMAGE==0
#include "spd_addr.h"
#include "cpu/amd/microcode/microcode.c"
#include "cpu/amd/model_10xxx/update_microcode.c"
@@ -323,5 +315,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x43); // Should never see this post code.
}
-
-#endif