summaryrefslogtreecommitdiff
path: root/src/mainboard/msi/ms9652_fam10
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/msi/ms9652_fam10')
-rw-r--r--src/mainboard/msi/ms9652_fam10/Makefile.inc16
-rw-r--r--src/mainboard/msi/ms9652_fam10/resourcemap.c6
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c1
3 files changed, 21 insertions, 2 deletions
diff --git a/src/mainboard/msi/ms9652_fam10/Makefile.inc b/src/mainboard/msi/ms9652_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/msi/ms9652_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/msi/ms9652_fam10/resourcemap.c b/src/mainboard/msi/ms9652_fam10/resourcemap.c
index 825f5ae664..59155c6d23 100644
--- a/src/mainboard/msi/ms9652_fam10/resourcemap.c
+++ b/src/mainboard/msi/ms9652_fam10/resourcemap.c
@@ -15,7 +15,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 7caf6cde68..8b4350429a 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -44,7 +44,6 @@
#include <southbridge/amd/common/reset.h>
#include <southbridge/nvidia/mcp55/mcp55.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)