summaryrefslogtreecommitdiff
path: root/src/mainboard/msi
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 0bdcd3823c..b2bfc8b680 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -30,6 +30,7 @@
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
+#include <timestamp.h>
#include <lib.h>
#include <spd.h>
#include <cpu/amd/model_10xxx_rev.h>
@@ -106,6 +107,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u8 reg;
msr_t msr;
+ timestamp_init(timestamp_get());
+ timestamp_add_now(TS_START_ROMSTAGE);
+
if (!cpu_init_detectedx && boot_cpu()) {
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
@@ -229,11 +233,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x40);
+ timestamp_add_now(TS_BEFORE_INITRAM);
printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
+ timestamp_add_now(TS_AFTER_INITRAM);
+
cbmem_initialize_empty();
post_code(0x41);
+ timestamp_add_now(TS_END_ROMSTAGE);
+
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x43); // Should never see this post code.
}