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-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index cb4d02feba..f4413edead 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -173,7 +173,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#if CONFIG_LOGICAL_CPUS
/* Core0 on each node is configured. Now setup any additional cores. */
printk(BIOS_DEBUG, "start_other_cores()\n");
- start_other_cores();
+ start_other_cores(bsp_apicid);
post_code(0x37);
printk(BIOS_DEBUG, "wait_all_other_cores_started()\n");
wait_all_other_cores_started(bsp_apicid);