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-rw-r--r--src/mainboard/msi/ms7721/acpi/gpe.asl2
-rw-r--r--src/mainboard/msi/ms7721/acpi/sleep.asl2
-rw-r--r--src/mainboard/msi/ms7721/buildOpts.c10
3 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/msi/ms7721/acpi/gpe.asl b/src/mainboard/msi/ms7721/acpi/gpe.asl
index c34faaf05e..297db37a67 100644
--- a/src/mainboard/msi/ms7721/acpi/gpe.asl
+++ b/src/mainboard/msi/ms7721/acpi/gpe.asl
@@ -69,4 +69,4 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
-} /* End Scope GPE */
+} /* End Scope GPE */
diff --git a/src/mainboard/msi/ms7721/acpi/sleep.asl b/src/mainboard/msi/ms7721/acpi/sleep.asl
index 3250f5ef4e..08b7de47f3 100644
--- a/src/mainboard/msi/ms7721/acpi/sleep.asl
+++ b/src/mainboard/msi/ms7721/acpi/sleep.asl
@@ -44,7 +44,7 @@ Method(\_PTS, 1) {
/* On older chips, clear PciExpWakeDisEn */
/*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ * Store(0,\_SB.PWDE)
*}
*/
diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c
index 9bce45a4b8..adcb41797e 100644
--- a/src/mainboard/msi/ms7721/buildOpts.c
+++ b/src/mainboard/msi/ms7721/buildOpts.c
@@ -168,11 +168,11 @@
#define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL 3
#if IS_ENABLED(CONFIG_GFXUMA)
-#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
-#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
-//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
-#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
-#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
+#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
+#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
+//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
+#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
+#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
#define BLDCFG_IOMMU_SUPPORT TRUE