diff options
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r-- | src/mainboard/msi/ms6178/Kconfig | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms6178/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms6178/romstage.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/msi/ms6178/Kconfig b/src/mainboard/msi/ms6178/Kconfig index 16662da312..a6af3260d0 100644 --- a/src/mainboard/msi/ms6178/Kconfig +++ b/src/mainboard/msi/ms6178/Kconfig @@ -23,7 +23,7 @@ config BOARD_MSI_MS_6178 select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 - select SOUTHBRIDGE_INTEL_I82801XX + select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_WINBOND_W83627HF select ROMCC select HAVE_PIRQ_TABLE diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb index baa0e040b8..4863957714 100644 --- a/src/mainboard/msi/ms6178/devicetree.cb +++ b/src/mainboard/msi/ms6178/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/intel/i82810 # Northbridge device pci_domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on end # Onboard VGA - chip southbridge/intel/i82801xx # Southbridge + chip southbridge/intel/i82801ax # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/msi/ms6178/romstage.c b/src/mainboard/msi/ms6178/romstage.c index a320dde763..976d24a56c 100644 --- a/src/mainboard/msi/ms6178/romstage.c +++ b/src/mainboard/msi/ms6178/romstage.c @@ -35,7 +35,7 @@ #include "northbridge/intel/i82810/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" -#include "southbridge/intel/i82801xx/i82801xx_early_smbus.c" +#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "pc80/udelay_io.c" #include "lib/debug.c" #include "northbridge/intel/i82810/raminit.c" |