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-rw-r--r--src/mainboard/olpc/Kconfig2
-rw-r--r--src/mainboard/olpc/btest/devicetree.cb4
-rw-r--r--src/mainboard/olpc/btest/irq_tables.c2
-rw-r--r--src/mainboard/olpc/btest/mainboard.c42
-rw-r--r--src/mainboard/olpc/btest/romstage.c16
-rw-r--r--src/mainboard/olpc/rev_a/devicetree.cb4
-rw-r--r--src/mainboard/olpc/rev_a/irq_tables.c2
-rw-r--r--src/mainboard/olpc/rev_a/mainboard.c2
-rw-r--r--src/mainboard/olpc/rev_a/romstage.c16
9 files changed, 45 insertions, 45 deletions
diff --git a/src/mainboard/olpc/Kconfig b/src/mainboard/olpc/Kconfig
index 658ebb51c6..a74f393774 100644
--- a/src/mainboard/olpc/Kconfig
+++ b/src/mainboard/olpc/Kconfig
@@ -1,7 +1,7 @@
choice
prompt "Mainboard model"
depends on VENDOR_OLPC
-
+
source "src/mainboard/olpc/rev_a/Kconfig"
source "src/mainboard/olpc/btest/Kconfig"
diff --git a/src/mainboard/olpc/btest/devicetree.cb b/src/mainboard/olpc/btest/devicetree.cb
index e0da82836a..ca55ce1b7e 100644
--- a/src/mainboard/olpc/btest/devicetree.cb
+++ b/src/mainboard/olpc/btest/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/gx2
device apic 0 on end
end
end
- device pci_domain 0 on
+ device pci_domain 0 on
device pci 1.0 on end
device pci 1.1 on end
chip southbridge/amd/cs5536
@@ -18,7 +18,7 @@ chip northbridge/amd/gx2
# SIRQ Mode = continous , It would be better if the EC could operate in
# Active(Quiet) mode. Save power....
# SIRQ Enable = Enabled
- # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
+ # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
#register "lpc_irq" = "0x00001002"
#register "lpc_serirq_enable" = "0xEFFD0080"
#register "enable_gpio0_inta" = "1"
diff --git a/src/mainboard/olpc/btest/irq_tables.c b/src/mainboard/olpc/btest/irq_tables.c
index 598350b4b8..f751b481ca 100644
--- a/src/mainboard/olpc/btest/irq_tables.c
+++ b/src/mainboard/olpc/btest/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify!
+/* This file was generated by getpir.c, do not modify!
(but if you do, please run checkpir on it to verify)
* Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
*
diff --git a/src/mainboard/olpc/btest/mainboard.c b/src/mainboard/olpc/btest/mainboard.c
index b184a566d0..1e5add3dc0 100644
--- a/src/mainboard/olpc/btest/mainboard.c
+++ b/src/mainboard/olpc/btest/mainboard.c
@@ -73,26 +73,26 @@ static void
init_cafe_irq(void){
const unsigned char slots_cafe[4] = {11, 0, 0, 0};
-
- /* CAFE PCI slots */
- pci_assign_irqs(0, 0x0C, slots_cafe);
-
- /* Make the pin assignments - NOTENOTENOTE: This should be
- * configurable!
- */
-
- /* Configure the GPIO pins to use - class 0, index 9 to configure
- * AB. Write 0xFF to disable
- */
-
- vrWrite(0x9, 0XFF00);
-
- /* Configure the GPIO pins to use - class 0, index A to configure
- * CD. Write 0xFF to disable
- */
-
- vrWrite(0xA, 0xFFFF);
-
+
+ /* CAFE PCI slots */
+ pci_assign_irqs(0, 0x0C, slots_cafe);
+
+ /* Make the pin assignments - NOTENOTENOTE: This should be
+ * configurable!
+ */
+
+ /* Configure the GPIO pins to use - class 0, index 9 to configure
+ * AB. Write 0xFF to disable
+ */
+
+ vrWrite(0x9, 0XFF00);
+
+ /* Configure the GPIO pins to use - class 0, index A to configure
+ * CD. Write 0xFF to disable
+ */
+
+ vrWrite(0xA, 0xFFFF);
+
}
@@ -111,7 +111,7 @@ static void init(struct device *dev) {
* conditional we can make it a config variable later.
*/
- printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",
+ printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",
__func__, bus, devfn, usbirq);
usb = dev_find_slot(bus, devfn);
if (! usb){
diff --git a/src/mainboard/olpc/btest/romstage.c b/src/mainboard/olpc/btest/romstage.c
index 1503baa6ba..fc605d1a88 100644
--- a/src/mainboard/olpc/btest/romstage.c
+++ b/src/mainboard/olpc/btest/romstage.c
@@ -50,7 +50,7 @@ static inline unsigned int fls(unsigned int x)
Trrd=2 (act2act)
Tref=17.8ms
*/
-static void sdram_set_spd_registers(const struct mem_controller *ctrl)
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
{
/* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
* component Banks (byte 17) * module banks, side (byte 5) *
@@ -100,11 +100,11 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
/* timing and mode ... */
msr = rdmsr(0x20000019);
-
- /* per standard bios settings */
+
+ /* per standard bios settings */
msr.hi = 0x18000108;
- msr.lo =
+ msr.lo =
(6<<28) | // cas_lat
(10<<24)| // ref2act
(7<<20)| // act2pre
@@ -114,8 +114,8 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
(2<<6)| // dplwr
(2<<4)| // dplrd
(3); // dal
- /* the msr value reported by quanta is very, very different.
- * we will go with that value for now.
+ /* the msr value reported by quanta is very, very different.
+ * we will go with that value for now.
*/
msr.lo = 0x286332a3;
@@ -180,9 +180,9 @@ static void main(unsigned long bist)
cpuRegInit();
print_err("done cpuRegInit\n");
-
+
sdram_initialize(1, memctrl);
-
+
/* Check all of memory */
//ram_check(0x00000000, 640*1024);
}
diff --git a/src/mainboard/olpc/rev_a/devicetree.cb b/src/mainboard/olpc/rev_a/devicetree.cb
index e0da82836a..ca55ce1b7e 100644
--- a/src/mainboard/olpc/rev_a/devicetree.cb
+++ b/src/mainboard/olpc/rev_a/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/amd/gx2
device apic 0 on end
end
end
- device pci_domain 0 on
+ device pci_domain 0 on
device pci 1.0 on end
device pci 1.1 on end
chip southbridge/amd/cs5536
@@ -18,7 +18,7 @@ chip northbridge/amd/gx2
# SIRQ Mode = continous , It would be better if the EC could operate in
# Active(Quiet) mode. Save power....
# SIRQ Enable = Enabled
- # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
+ # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
#register "lpc_irq" = "0x00001002"
#register "lpc_serirq_enable" = "0xEFFD0080"
#register "enable_gpio0_inta" = "1"
diff --git a/src/mainboard/olpc/rev_a/irq_tables.c b/src/mainboard/olpc/rev_a/irq_tables.c
index 598350b4b8..f751b481ca 100644
--- a/src/mainboard/olpc/rev_a/irq_tables.c
+++ b/src/mainboard/olpc/rev_a/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify!
+/* This file was generated by getpir.c, do not modify!
(but if you do, please run checkpir on it to verify)
* Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
*
diff --git a/src/mainboard/olpc/rev_a/mainboard.c b/src/mainboard/olpc/rev_a/mainboard.c
index a02e583558..adfb957ab7 100644
--- a/src/mainboard/olpc/rev_a/mainboard.c
+++ b/src/mainboard/olpc/rev_a/mainboard.c
@@ -83,7 +83,7 @@ static void init(struct device *dev) {
* conditional we can make it a config variable later.
*/
- printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",
+ printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",
__func__, bus, devfn, usbirq);
usb = dev_find_slot(bus, devfn);
if (! usb){
diff --git a/src/mainboard/olpc/rev_a/romstage.c b/src/mainboard/olpc/rev_a/romstage.c
index 1503baa6ba..fc605d1a88 100644
--- a/src/mainboard/olpc/rev_a/romstage.c
+++ b/src/mainboard/olpc/rev_a/romstage.c
@@ -50,7 +50,7 @@ static inline unsigned int fls(unsigned int x)
Trrd=2 (act2act)
Tref=17.8ms
*/
-static void sdram_set_spd_registers(const struct mem_controller *ctrl)
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
{
/* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
* component Banks (byte 17) * module banks, side (byte 5) *
@@ -100,11 +100,11 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
/* timing and mode ... */
msr = rdmsr(0x20000019);
-
- /* per standard bios settings */
+
+ /* per standard bios settings */
msr.hi = 0x18000108;
- msr.lo =
+ msr.lo =
(6<<28) | // cas_lat
(10<<24)| // ref2act
(7<<20)| // act2pre
@@ -114,8 +114,8 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
(2<<6)| // dplwr
(2<<4)| // dplrd
(3); // dal
- /* the msr value reported by quanta is very, very different.
- * we will go with that value for now.
+ /* the msr value reported by quanta is very, very different.
+ * we will go with that value for now.
*/
msr.lo = 0x286332a3;
@@ -180,9 +180,9 @@ static void main(unsigned long bist)
cpuRegInit();
print_err("done cpuRegInit\n");
-
+
sdram_initialize(1, memctrl);
-
+
/* Check all of memory */
//ram_check(0x00000000, 640*1024);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-30 11:49:33 +0000