summaryrefslogtreecommitdiff
path: root/src/mainboard/pcengines/apu1
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/pcengines/apu1')
-rw-r--r--src/mainboard/pcengines/apu1/devicetree.cb137
1 files changed, 68 insertions, 69 deletions
diff --git a/src/mainboard/pcengines/apu1/devicetree.cb b/src/mainboard/pcengines/apu1/devicetree.cb
index 72e89c0b31..6af6d2e6de 100644
--- a/src/mainboard/pcengines/apu1/devicetree.cb
+++ b/src/mainboard/pcengines/apu1/devicetree.cb
@@ -15,79 +15,78 @@
#
chip northbridge/amd/agesa/family14/root_complex
device cpu_cluster 0 on
- chip cpu/amd/agesa/family14
- device lapic 0 on end
- end
+ chip cpu/amd/agesa/family14
+ device lapic 0 on end
+ end
end
device domain 0 on
subsystemid 0x1022 0x1510 inherit
- chip northbridge/amd/agesa/family14 # CPU side of HT root complex
-# device pci 18.0 on # northbridge
- chip northbridge/amd/agesa/family14 # PCI side of HT root complex
- device pci 0.0 on end # Root Complex
- device pci 1.0 off end # Internal Graphics P2P bridge 0x980[2456]
- device pci 4.0 on end # PCIE P2P bridge on-board NIC 3
- device pci 5.0 on end # PCIE P2P bridge on-board NIC 2
- device pci 6.0 on end # PCIE P2P bridge on-board NIC 1
- device pci 7.0 on end # PCIE P2P bridge miniPCIe slot 1
- device pci 8.0 on end # NB/SB Link P2P bridge
- end # agesa northbridge
+ chip northbridge/amd/agesa/family14
+ device pci 0.0 on end # Root Complex
+ device pci 1.0 off end # Internal Graphics P2P bridge 0x980[2456]
+ device pci 4.0 on end # PCIE P2P bridge on-board NIC 3
+ device pci 5.0 on end # PCIE P2P bridge on-board NIC 2
+ device pci 6.0 on end # PCIE P2P bridge on-board NIC 1
+ device pci 7.0 on end # PCIE P2P bridge miniPCIe slot 1
+ device pci 8.0 on end # NB/SB Link P2P bridge
+ end # agesa northbridge
- chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
- device pci 11.0 on end # SATA
- device pci 12.0 on end # OHCI USB 0-4
- device pci 12.2 on end # EHCI USB 0-4
- device pci 13.0 on end # OHCI USB 5-9
- device pci 13.2 on end # EHCI USB 5-9
- device pci 14.0 on end # SMBus
- device pci 14.1 off end # IDE 0x439c
- device pci 14.2 off end # HDA 0x4383
- device pci 14.3 on # LPC 0x439d
- chip superio/nuvoton/nct5104d
- register "irq_trigger_type" = "0"
- device pnp 2e.0 off end
- device pnp 2e.2 on
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.10 off
- # UART C is conditionally turned on
- io 0x60 = 0x3e8
- irq 0x70 = 4
- end
- device pnp 2e.11 off
- # UART D is conditionally turned on
- io 0x60 = 0x2e8
- irq 0x70 = 3
- end
- device pnp 2e.8 off end
- device pnp 2e.f off end
- # GPIO0 and GPIO1 are conditionally turned on
- device pnp 2e.007 off end
- device pnp 2e.107 off end
- device pnp 2e.607 off end
- device pnp 2e.e off end
+ chip southbridge/amd/cimx/sb800
+ device pci 11.0 on end # SATA
+ device pci 12.0 on end # OHCI USB 0-4
+ device pci 12.2 on end # EHCI USB 0-4
+ device pci 13.0 on end # OHCI USB 5-9
+ device pci 13.2 on end # EHCI USB 5-9
+ device pci 14.0 on end # SMBus
+ device pci 14.1 off end # IDE 0x439c
+ device pci 14.2 off end # HDA 0x4383
+ device pci 14.3 on # LPC 0x439d
+ chip superio/nuvoton/nct5104d
+ register "irq_trigger_type" = "0"
+ device pnp 2e.0 off end
+ device pnp 2e.2 on
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
end
- end #LPC
- device pci 14.4 on end # PCIB 0x4384 always active; pins remapped to gpio by disconnect_pcib = 1
- device pci 14.5 off end # OHCI FS/LS USB
- #device pci 14.6 off end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699)
- device pci 15.0 on end # PCIe PortA miniPCIe slot 2
- device pci 15.1 off end # PCIe PortB
- device pci 15.2 off end # PCIe PortC
- device pci 15.3 off end # PCIe PortD
- device pci 16.0 on end # OHCI USB 10-13
- device pci 16.2 on end # EHCI USB 10-13
- register "gpp_configuration" = "4" # GPP_CFGMODE_X1111
- register "disconnect_pcib" = "1"
- register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
- end #southbridge/amd/cimx/sb800
-# end # device pci 18.0
-# These seem unnecessary
+ device pnp 2e.3 on
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.10 off
+ # UART C is conditionally turned on
+ io 0x60 = 0x3e8
+ irq 0x70 = 4
+ end
+ device pnp 2e.11 off
+ # UART D is conditionally turned on
+ io 0x60 = 0x2e8
+ irq 0x70 = 3
+ end
+ device pnp 2e.8 off end
+ device pnp 2e.f off end
+ # GPIO0 and GPIO1 are conditionally turned on
+ device pnp 2e.007 off end
+ device pnp 2e.107 off end
+ device pnp 2e.607 off end
+ device pnp 2e.e off end
+ end
+ end #LPC
+ device pci 14.4 on end # PCIB 0x4384 always active; pins remapped to gpio by disconnect_pcib = 1
+ device pci 14.5 off end # OHCI FS/LS USB
+ #device pci 14.6 off end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699)
+ device pci 15.0 on end # PCIe PortA miniPCIe slot 2
+ device pci 15.1 off end # PCIe PortB
+ device pci 15.2 off end # PCIe PortC
+ device pci 15.3 off end # PCIe PortD
+ device pci 16.0 on end # OHCI USB 10-13
+ device pci 16.2 on end # EHCI USB 10-13
+ register "gpp_configuration" = "4" # GPP_CFGMODE_X1111
+ register "disconnect_pcib" = "1"
+ register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
+ end #southbridge/amd/cimx/sb800
+
+ chip northbridge/amd/agesa/family14
+ # These seem unnecessary
device pci 18.0 on end
device pci 18.1 on end
device pci 18.2 on end
@@ -96,7 +95,7 @@ chip northbridge/amd/agesa/family14/root_complex
device pci 18.5 on end
device pci 18.6 on end
device pci 18.7 on end
+ end # agesa northbridge
- end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
end #domain
end #northbridge/amd/agesa/family14/root_complex