diff options
Diffstat (limited to 'src/mainboard/pcengines/apu1')
-rw-r--r-- | src/mainboard/pcengines/apu1/gpio_ftns.c | 16 | ||||
-rw-r--r-- | src/mainboard/pcengines/apu1/gpio_ftns.h | 7 | ||||
-rw-r--r-- | src/mainboard/pcengines/apu1/mainboard.c | 9 | ||||
-rw-r--r-- | src/mainboard/pcengines/apu1/romstage.c | 23 |
4 files changed, 18 insertions, 37 deletions
diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.c b/src/mainboard/pcengines/apu1/gpio_ftns.c index 151345bded..f6b7a9a7dc 100644 --- a/src/mainboard/pcengines/apu1/gpio_ftns.c +++ b/src/mainboard/pcengines/apu1/gpio_ftns.c @@ -5,16 +5,7 @@ #include <southbridge/amd/cimx/sb800/SBPLATFORM.h> #include "gpio_ftns.h" -uintptr_t find_gpio_base(void) -{ - uintptr_t base_addr; - /* Get the ACPIMMIO base address */ - base_addr = pm_read32(0x24); - base_addr &= 0xFFFFF000; - return base_addr; -} - -void configure_gpio(uintptr_t base_addr, u8 gpio, u8 iomux_ftn, u8 setting) +void configure_gpio(u8 gpio, u8 iomux_ftn, u8 setting) { u8 bdata; @@ -26,14 +17,13 @@ void configure_gpio(uintptr_t base_addr, u8 gpio, u8 iomux_ftn, u8 setting) gpio_100_write8(gpio, bdata); } -u8 read_gpio(uintptr_t base_addr, u8 gpio) +u8 read_gpio(u8 gpio) { return (gpio_100_read8(gpio) & GPIO_DATA_IN) ? 1 : 0; } int get_spd_offset(void) { - uintptr_t base_addr = find_gpio_base(); - u8 spd_offset = read_gpio(base_addr, GPIO_16); + u8 spd_offset = read_gpio(GPIO_16); return spd_offset; } diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.h b/src/mainboard/pcengines/apu1/gpio_ftns.h index 03a7b457cd..79ed4a6d77 100644 --- a/src/mainboard/pcengines/apu1/gpio_ftns.h +++ b/src/mainboard/pcengines/apu1/gpio_ftns.h @@ -5,13 +5,10 @@ #include <stdint.h> -uintptr_t find_gpio_base(void); -void configure_gpio(uintptr_t base_addr, u8 gpio, u8 iomux_ftn, u8 setting); -u8 read_gpio(uintptr_t base_addr, u8 gpio); +void configure_gpio(u8 gpio, u8 iomux_ftn, u8 setting); +u8 read_gpio(u8 gpio); int get_spd_offset(void); -#define IOMUX_OFFSET 0xD00 -#define GPIO_OFFSET 0x100 #define GPIO_10 10 // PE3 Reset #define GPIO_11 11 // PE4 Reset #define GPIO_15 15 // board rev strap ms bit diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c index acb5748656..a2a78c55ce 100644 --- a/src/mainboard/pcengines/apu1/mainboard.c +++ b/src/mainboard/pcengines/apu1/mainboard.c @@ -362,8 +362,6 @@ const char *smbios_system_sku(void) static void mainboard_final(void *chip_info) { - u32 mmio_base; - printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Final.\n"); /* @@ -371,10 +369,9 @@ static void mainboard_final(void *chip_info) * LED2/D6/GPIO_190 should be 1 * LED3/D5/GPIO_191 should be 1 */ - mmio_base = find_gpio_base(); - configure_gpio(mmio_base, GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); - configure_gpio(mmio_base, GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); - configure_gpio(mmio_base, GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); usb_oc_setup(); } diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c index 858c2104b0..f5948274fb 100644 --- a/src/mainboard/pcengines/apu1/romstage.c +++ b/src/mainboard/pcengines/apu1/romstage.c @@ -8,8 +8,6 @@ static void early_lpc_init(void) { - u32 mmio_base; - /* PC Engines requires system boot when power is applied. This feature is * controlled in PM_REG 5Bh register. "Always Power On" works by writing a * value of 05h. @@ -26,17 +24,16 @@ static void early_lpc_init(void) pm_write8(SB_PMIOA_REGEA, bdata); //configure required GPIOs - mmio_base = find_gpio_base(); - configure_gpio(mmio_base, GPIO_10, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); - configure_gpio(mmio_base, GPIO_11, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); - configure_gpio(mmio_base, GPIO_15, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_16, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_17, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_18, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_187, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); - configure_gpio(mmio_base, GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); - configure_gpio(mmio_base, GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_10, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_11, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_15, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_16, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_17, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_18, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_187, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); } void board_BeforeAgesa(struct sysinfo *cb) |