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Diffstat (limited to 'src/mainboard/roda/rk9/acpi/superio.asl')
-rw-r--r--src/mainboard/roda/rk9/acpi/superio.asl192
1 files changed, 96 insertions, 96 deletions
diff --git a/src/mainboard/roda/rk9/acpi/superio.asl b/src/mainboard/roda/rk9/acpi/superio.asl
index 6f356e9833..d9f6ac0a8a 100644
--- a/src/mainboard/roda/rk9/acpi/superio.asl
+++ b/src/mainboard/roda/rk9/acpi/superio.asl
@@ -19,13 +19,13 @@ Device (SIO1)
Method (READ, 3)
{
Acquire (SIOM, 0xffff)
- If (LEqual(Arg0, 0)) {
- Store (0x55, INDX)
- Store (Arg1, INDX)
- Store (DATA, Local1)
- Store (0xaa, INDX)
+ If (Arg0 == 0) {
+ INDX = 0x55
+ INDX = Arg1
+ Local1 = DATA
+ INDX = 0xaa
}
- And (Local1, Arg2, Local1)
+ Local1 &= Arg2
Release(SIOM)
Return(Local1)
}
@@ -33,11 +33,11 @@ Device (SIO1)
Method (WRIT, 3)
{
Acquire (SIOM, 0xffff)
- If (LEqual(Arg0, 0)) {
- Store (0x55, INDX)
- Store (Arg1, INDX)
- Store (Arg2, DATA)
- Store (0xaa, INDX)
+ If (Arg0 == 0) {
+ INDX = 0x55
+ INDX = Arg1
+ DATA = Arg2
+ INDX = 0xaa
}
Release(SIOM)
}
@@ -52,18 +52,18 @@ Device (SIO1)
Method (_STA, 0)
{
// Device disabled by coreboot?
- If (LEqual(CMAP, 0)) {
+ If (CMAP == 0) {
Return (0)
}
// Is the hardware enabled?
- Store (READ(0, 0x24, 0xff), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x24, 0xff)
+ If (Local0 == 0) {
Return (0xd)
} Else {
// Power Enabled?
- Store (READ(0, 0x02, 0x08), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x02, 0x08)
+ If (Local0 == 0) {
Return (0x0d)
} Else {
Return (0x0f)
@@ -76,12 +76,12 @@ Device (SIO1)
{
WRIT(0, 0x24, 0x00)
- Store(READ(0, 0x28, 0x0f), Local0)
+ Local0 = READ (0, 0x28, 0x0f)
WRIT(0, 0x28, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x08, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = ~0x08
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
@@ -106,8 +106,8 @@ Device (SIO1)
IRQNoFlags(_IRA) { 4 }
})
- And (_STA(), 0x02, Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = _STA() & 0x02
+ If (Local0 == 0) {
Return(NONE)
}
@@ -119,15 +119,15 @@ Device (SIO1)
\_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQ)
/* I/O Base */
- Store (READ(0, 0x24, 0xfe), Local0)
- ShiftLeft(Local0, 0x02, Local0)
- Store(Local0, IOMN)
- Store(Local0, IOMX)
+ Local0 = READ (0, 0x24, 0xfe)
+ Local0 <<= 2
+ IOMN = Local0
+ IOMX = Local0
/* Interrupt */
- Store(READ(0, 0x28, 0xf0), Local0)
- ShiftRight(Local0, 4, Local0)
- ShiftLeft(1, Local0, IRQ)
+ Local0 = READ (0, 0x28, 0xf0)
+ Local0 >>= 4
+ IRQ = 1 << Local0
Return(RSRC)
}
@@ -140,29 +140,29 @@ Device (SIO1)
WRIT(0, 0x24, 0)
FindSetRightBit(IRQL, Local0)
- Decrement(Local0)
- ShiftLeft(Local0, 4, Local0)
+ Local0--
+ Local0 <<= 4
- Store(READ(0, 0x28, 0x0f), Local1)
- Or(Local0, Local1, Local0)
+ Local1 = READ (0, 0x28, 0x0f)
+ Local0 |= Local1
WRIT(0, 0x28, Local0)
- Store(IOLO, Local0)
- ShiftRight(Local0, 2, Local0)
- And(Local0, 0xfe, Local0)
+ Local0 = IOLO
+ Local0 >>= 2
+ Local0 &= 0xfe
- Store(IOHI, Local1)
- ShiftLeft(Local1, 6, Local1)
- Or (Local0, Local1, Local0)
+ Local1 = IOHI
+ Local1 <<= 6
+ Local0 |= Local1
WRIT(0, 0x24, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x08, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x08
WRIT(0, 0x02, Local0)
- Store(READ(0, 0x07, 0xff), Local0)
- Not(0x40, Local1)
- And (Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x40
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
@@ -170,22 +170,22 @@ Device (SIO1)
/* D0 state - Line drivers are on */
Method (_PS0, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x08, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x08
WRIT(0, 0x02, Local0)
- Store (READ(0, 0x07, 0xff), Local0)
- Not(0x40, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x40
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D3 State - Line drivers are off */
Method(_PS3, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x08, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = ~0x08
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
}
@@ -200,24 +200,24 @@ Device (SIO1)
Method (_STA, 0)
{
// Device disabled by coreboot?
- If (LEqual(CMBP, 0)) {
+ If (CMBP == 0) {
Return (0)
}
/* IRDA? */
- Store(READ(0, 0x0c, 0x38), Local0)
- If (LNotEqual(Local0, Zero)) {
+ Local0 = READ (0, 0x0c, 0x38)
+ If (Local0 != 0) {
Return (0)
}
// Is the hardware enabled?
- Store (READ(0, 0x25, 0xff), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x25, 0xff)
+ If (Local0 == 0) {
Return (0xd)
} Else {
// Power Enabled?
- Store (READ(0, 0x02, 0x80), Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = READ (0, 0x02, 0x80)
+ If (Local0 == 0) {
Return (0x0d)
} Else {
Return (0x0f)
@@ -230,12 +230,12 @@ Device (SIO1)
{
WRIT(0, 0x25, 0x00)
- Store(READ(0, 0x28, 0xf0), Local0)
+ Local0 = READ (0, 0x28, 0xf0)
WRIT(0, 0x28, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x80, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = ~0x80
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
@@ -260,8 +260,8 @@ Device (SIO1)
IRQNoFlags(_IRB) { 3 }
})
- And (_STA(), 0x02, Local0)
- If (LEqual(Local0, 0)) {
+ Local0 = _STA() & 0x02
+ If (Local0 == 0) {
Return(NONE)
}
@@ -273,14 +273,14 @@ Device (SIO1)
\_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQ)
/* I/O Base */
- Store (READ(0, 0x25, 0xfe), Local0)
- ShiftLeft(Local0, 0x02, Local0)
- Store(Local0, IOMN)
- Store(Local0, IOMX)
+ Local0 = READ (0, 0x25, 0xfe)
+ Local0 <<= 2
+ IOMN = Local0
+ IOMX = Local0
/* Interrupt */
- Store(READ(0, 0x28, 0x0f), Local0)
- ShiftLeft(1, Local0, IRQ)
+ Local0 = READ (0, 0x28, 0x0f)
+ IRQ = 1 << Local0
Return(RSRC)
}
@@ -293,55 +293,55 @@ Device (SIO1)
WRIT(0, 0x25, 0)
FindSetRightBit(IRQL, Local0)
- Decrement(Local0)
+ Local0--
- Store(READ(0, 0x28, 0xf0), Local1)
- Or(Local0, Local1, Local0)
+ Local1 = READ (0, 0x28, 0xf0)
+ Local0 |= Local1
WRIT(0, 0x28, Local0)
- Store(IOLO, Local0)
- ShiftRight(Local0, 2, Local0)
- And(Local0, 0xfe, Local0)
+ Local0 = IOLO
+ Local0 >>= 2
+ Local0 &= 0xfe
- Store(IOHI, Local1)
- ShiftLeft(Local1, 6, Local1)
- Or (Local0, Local1, Local0)
+ Local1 = IOHI
+ Local1 <<= 6
+ Local0 |= Local1
WRIT(0, 0x25, Local0)
- Store(READ(0, 0x0c, 0xff), Local0)
- Not(0x38, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ (0, 0x0c, 0xff)
+ Local1 = ~0x38
+ Local0 &= Local1
WRIT(0, 0x0c, Local0)
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x80, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x80
WRIT(0, 0x02, Local0)
- Store(READ(0, 0x07, 0xff), Local0)
- Not(0x20, Local1)
- And (Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x20
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D0 state - Line drivers are on */
Method (_PS0, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Or(Local0, 0x80, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local0 |= 0x80
WRIT(0, 0x02, Local0)
- Store (READ(0, 0x07, 0xff), Local0)
- Not(0x20, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ (0, 0x07, 0xff)
+ Local1 = ~0x20
+ Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D3 State - Line drivers are off */
Method(_PS3, 0)
{
- Store(READ(0, 0x02, 0xff), Local0)
- Not(0x80, Local1)
- And(Local0, Local1, Local0)
+ Local0 = READ(0, 0x02, 0xff)
+ Local1 = ~0x80
+ Local0 &= Local1
WRIT(0, 0x02, Local0)
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-02 15:18:49 +0000