diff options
Diffstat (limited to 'src/mainboard/samsung/stumpy')
| -rw-r--r-- | src/mainboard/samsung/stumpy/chromeos.c | 8 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/romstage.c | 3 |
2 files changed, 6 insertions, 5 deletions
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index 731126c04e..6b296c0577 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -18,7 +18,7 @@ */ #include <string.h> -#include <vendorcode/google/chromeos/chromeos.h> +#include <bootmode.h> #include <arch/io.h> #include <device/device.h> #include <device/pci.h> @@ -108,9 +108,9 @@ int get_recovery_mode_switch(void) return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; } -#ifdef __PRE_RAM__ -void save_chromeos_gpios(void) +void init_bootmode_straps(void) { +#ifdef __PRE_RAM__ u16 gpio_base = pci_read_config32(PCH_LPC_DEV, GPIO_BASE) & 0xfffe; u32 gp_lvl3 = inl(gpio_base + GP_LVL3); u32 gp_lvl2 = inl(gpio_base + GP_LVL2); @@ -128,5 +128,5 @@ void save_chromeos_gpios(void) flags |= (1 << FLAG_DEV_MODE); pci_write_config32(PCI_DEV(0, 0x1f, 2), SATA_SP, flags); -} #endif +} diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 3e27a6adfb..4ce6e41981 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -30,6 +30,7 @@ #include <pc80/mc146818rtc.h> #include <cbmem.h> #include <console/console.h> +#include <bootmode.h> #include "superio/ite/it8772f/it8772f.h" #include "superio/ite/it8772f/early_serial.c" #include "northbridge/intel/sandybridge/sandybridge.h" @@ -239,7 +240,7 @@ void main(unsigned long bist) console_init(); #if CONFIG_CHROMEOS - save_chromeos_gpios(); + init_bootmode_straps(); #endif /* Halt if there was a built in self test failure */ |