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-rw-r--r--src/mainboard/samsung/lumpy/devicetree.cb1
-rw-r--r--src/mainboard/samsung/lumpy/romstage.c3
-rw-r--r--src/mainboard/samsung/stumpy/devicetree.cb1
-rw-r--r--src/mainboard/samsung/stumpy/romstage.c3
4 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index 719947310b..feae5bf1e8 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -61,6 +61,7 @@ chip northbridge/intel/sandybridge
# EC range is 0xa00-0xa3f
register "gen1_dec" = "0x003c0a01"
register "gen2_dec" = "0x003c0b01"
+ register "gen3_dec" = "0x00fc1601"
register "c2_latency" = "1"
register "p_cnt_throttling_supported" = "0"
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index a77149d927..d4b6dd834b 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -43,9 +43,6 @@ void pch_enable_lpc(void)
pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN |
KBC_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN);
- /* map full 256 bytes at 0x1600 to the LPC bus */
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0xfc1601);
-
try_enabling_LPC47N207_uart();
#else
/* Enable SuperIO + EC + KBC */
diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb
index 192e63d4d9..060fc40bb6 100644
--- a/src/mainboard/samsung/stumpy/devicetree.cb
+++ b/src/mainboard/samsung/stumpy/devicetree.cb
@@ -50,6 +50,7 @@ chip northbridge/intel/sandybridge
register "c2_latency" = "1"
register "p_cnt_throttling_supported" = "0"
+ register "gen1_dec" = "0x00fc1601"
# SuperIO range is 0x700-0x73f
register "gen2_dec" = "0x003c0701"
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index a8e28d67ac..77fd16016d 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -55,9 +55,6 @@ void pch_enable_lpc(void)
pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | KBC_LPC_EN |\
CNF2_LPC_EN | COMA_LPC_EN);
- /* map full 256 bytes at 0x1600 to the LPC bus */
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0xfc1601);
-
try_enabling_LPC47N207_uart();
#else
/* Enable SuperIO + PS/2 Keyboard/Mouse */