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-rw-r--r--src/mainboard/sapphire/pureplatinumh61/devicetree.cb9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb
index aff01302b2..b863c30851 100644
--- a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb
+++ b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb
@@ -55,7 +55,14 @@ chip northbridge/intel/sandybridge
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x33"
register "spi.opprefixes" = "{ 0x50, 0x06 }"
- register "spi.ops" = "{ { 0, 1, 0x01 }, { 1, 1, 0x02 }, { 1, 0, 0x03 }, { 0, 0, 0x05 }, { 1, 1, 0x20 }, { 0, 0, 0x9f }, { 0, 1, 0xad }, { 0, 1, 0x04 } }"
+ register "spi.ops" = "{{0x01, WRITE_NO_ADDR},
+ {0x02, WRITE_WITH_ADDR},
+ {0x03, READ_WITH_ADDR},
+ {0x05, READ_NO_ADDR},
+ {0x20, WRITE_WITH_ADDR},
+ {0x9f, READ_NO_ADDR},
+ {0xad, WRITE_NO_ADDR},
+ {0x04, WRITE_NO_ADDR}}"
device pci 16.0 on # Management Engine Interface 1
subsystemid 0x174b 0x1007
end