summaryrefslogtreecommitdiff
path: root/src/mainboard/sunw/ultra40
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/sunw/ultra40')
-rw-r--r--src/mainboard/sunw/ultra40/Config.lb3
-rw-r--r--src/mainboard/sunw/ultra40/devicetree.cb3
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/sunw/ultra40/Config.lb b/src/mainboard/sunw/ultra40/Config.lb
index 6fedd3a7ed..b00c2bc331 100644
--- a/src/mainboard/sunw/ultra40/Config.lb
+++ b/src/mainboard/sunw/ultra40/Config.lb
@@ -210,8 +210,6 @@ chip northbridge/amd/amdk8/root_complex
register "ide1_enable" = "1"
register "sata0_enable" = "1"
register "sata1_enable" = "1"
-# register "nic_rom_address" = "0xfff80000" # 64k
-# register "raid_rom_address" = "0xfff90000"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_addr" = "0x51"
end
@@ -243,7 +241,6 @@ chip northbridge/amd/amdk8/root_complex
device pci c.0 off end # PCI E 2
device pci d.0 off end # PCI E 1
device pci e.0 on end # PCI E 0
-# register "nic_rom_address" = "0xfff80000" # 64k
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51"
end
diff --git a/src/mainboard/sunw/ultra40/devicetree.cb b/src/mainboard/sunw/ultra40/devicetree.cb
index 01a59f714e..afa6f66beb 100644
--- a/src/mainboard/sunw/ultra40/devicetree.cb
+++ b/src/mainboard/sunw/ultra40/devicetree.cb
@@ -106,8 +106,6 @@ chip northbridge/amd/amdk8/root_complex
register "ide1_enable" = "1"
register "sata0_enable" = "1"
register "sata1_enable" = "1"
-# register "nic_rom_address" = "0xfff80000" # 64k
-# register "raid_rom_address" = "0xfff90000"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_addr" = "0x51"
end
@@ -139,7 +137,6 @@ chip northbridge/amd/amdk8/root_complex
device pci c.0 off end # PCI E 2
device pci d.0 off end # PCI E 1
device pci e.0 on end # PCI E 0
-# register "nic_rom_address" = "0xfff80000" # 64k
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51"
end