diff options
Diffstat (limited to 'src/mainboard/supermicro/h8dmr/romstage.c')
| -rw-r--r-- | src/mainboard/supermicro/h8dmr/romstage.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index eb7381724e..b137b6b76e 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -69,19 +69,19 @@ static void sio_setup(void) uint8_t byte; enable_smbus(); -// smbusx_write_byte(1, (0x58>>1), 0, 0x80); /* select bank0 */ - smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */ +// smbusx_write_byte(1, (0x58 >> 1), 0, 0x80); /* select bank0 */ + smbusx_write_byte(1, (0x58 >> 1), 0xb1, 0xff); /* set FAN ctrl to DC mode */ byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b); byte |= 0x20; pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte); dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0); - dword |= (1<<0); + dword |= (1 << 0); pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword); dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4); - dword |= (1<<16); + dword |= (1 << 16); pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword); } @@ -144,7 +144,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) #if CONFIG_SET_FIDVID { msr_t msr; - msr=rdmsr(0xc0010042); + msr = rdmsr(0xc0010042); printk(BIOS_DEBUG, "begin msr fid, vid %08x, %08x\n", msr.hi, msr.lo); } enable_fid_change(); @@ -153,7 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // show final fid and vid { msr_t msr; - msr=rdmsr(0xc0010042); + msr = rdmsr(0xc0010042); printk(BIOS_DEBUG, "end msr fid, vid %08x, %08x\n", msr.hi, msr.lo); } #endif |