diff options
Diffstat (limited to 'src/mainboard/supermicro/x6dhe_g2')
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g2/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g2/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g2/romstage.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig index eb3330c023..a456abea8a 100644 --- a/src/mainboard/supermicro/x6dhe_g2/Kconfig +++ b/src/mainboard/supermicro/x6dhe_g2/Kconfig @@ -3,7 +3,7 @@ config BOARD_SUPERMICRO_X6DHE_G2 select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7520 - select SOUTHBRIDGE_INTEL_I82801ER + select SOUTHBRIDGE_INTEL_I82801EX select SOUTHBRIDGE_INTEL_PXHD select SUPERIO_NSC_PC87427 select ROMCC diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb index 4bb720707c..e621594b93 100644 --- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb +++ b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb @@ -6,7 +6,7 @@ chip northbridge/intel/e7520 # MCH device pnp 00.3 off end end device pci_domain 0 on - chip southbridge/intel/i82801er # ICH5R + chip southbridge/intel/i82801ex # ICH5R register "pirq_a_d" = "0x0b070a05" register "pirq_e_h" = "0x0a808080" diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c index 4e9c1e270b..f38f4e9b07 100644 --- a/src/mainboard/supermicro/x6dhe_g2/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c @@ -12,7 +12,7 @@ #include "pc80/serial.c" #include "arch/i386/lib/console.c" #include "lib/ramtest.c" -#include "southbridge/intel/i82801er/i82801er_early_smbus.c" +#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" #include "superio/nsc/pc87427/pc87427.h" #include "cpu/x86/lapic/boot_cpu.c" |