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-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/Makefile.inc16
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/resourcemap.c6
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/Makefile.inc16
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/resourcemap.c6
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/Makefile.inc16
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/resourcemap.c6
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/romstage.c1
9 files changed, 63 insertions, 6 deletions
diff --git a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c b/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
index d4cbc93f47..7dc4df1fdb 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
@@ -15,7 +15,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index dea481fe18..838d7e2f09 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -45,7 +45,6 @@
#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#include <southbridge/nvidia/mcp55/early_setup_ss.h>
#include "southbridge/nvidia/mcp55/early_setup_car.c"
diff --git a/src/mainboard/supermicro/h8qme_fam10/Makefile.inc b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/supermicro/h8qme_fam10/resourcemap.c b/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
index d4cbc93f47..7dc4df1fdb 100644
--- a/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
@@ -15,7 +15,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 127b76f0a2..660610eb33 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -44,7 +44,6 @@
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#include <southbridge/nvidia/mcp55/early_setup_ss.h>
#include "southbridge/nvidia/mcp55/early_setup_car.c"
diff --git a/src/mainboard/supermicro/h8scm_fam10/Makefile.inc b/src/mainboard/supermicro/h8scm_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/supermicro/h8scm_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/supermicro/h8scm_fam10/resourcemap.c b/src/mainboard/supermicro/h8scm_fam10/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/supermicro/h8scm_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8scm_fam10/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index 0ad12188d1..23d47b4e2f 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -47,7 +47,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
void activate_spd_rom(const struct mem_controller *ctrl);