diff options
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r-- | src/mainboard/supermicro/h8dme/Config.lb | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dme/Makefile.inc | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dme/Options.lb | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr/Config.lb | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr/Makefile.inc | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr/Options.lb | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/Config.lb | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/Makefile.inc | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/Options.lb | 3 |
9 files changed, 23 insertions, 12 deletions
diff --git a/src/mainboard/supermicro/h8dme/Config.lb b/src/mainboard/supermicro/h8dme/Config.lb index 2141907900..18cde515db 100644 --- a/src/mainboard/supermicro/h8dme/Config.lb +++ b/src/mainboard/supermicro/h8dme/Config.lb @@ -108,8 +108,8 @@ end ## ## Include an id string (For safe flashing) ## -mainboardinit southbridge/nvidia/mcp55/id.inc -ldscript /southbridge/nvidia/mcp55/id.lds +mainboardinit arch/i386/lib/id.inc +ldscript /arch/i386/lib/id.lds ## ## ROMSTRAP table for MCP55 diff --git a/src/mainboard/supermicro/h8dme/Makefile.inc b/src/mainboard/supermicro/h8dme/Makefile.inc index 8075ba2a34..d53db014ed 100644 --- a/src/mainboard/supermicro/h8dme/Makefile.inc +++ b/src/mainboard/supermicro/h8dme/Makefile.inc @@ -34,7 +34,7 @@ initobj-y += crt0.o crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc -crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc +crt0-y += ../../../../src/arch/i386/lib/id.inc crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc crt0-y += auto.inc @@ -42,7 +42,7 @@ crt0-y += auto.inc ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds -ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds +ldscript-y += ../../../../src/arch/i386/lib/id.lds ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds ldscript-y += ../../../../src/arch/i386/lib/failover.lds diff --git a/src/mainboard/supermicro/h8dme/Options.lb b/src/mainboard/supermicro/h8dme/Options.lb index 5a361350bc..85d8331701 100644 --- a/src/mainboard/supermicro/h8dme/Options.lb +++ b/src/mainboard/supermicro/h8dme/Options.lb @@ -114,6 +114,8 @@ uses CONFIG_WAIT_BEFORE_CPUS_INIT uses CONFIG_USE_PRINTK_IN_CAR +uses CONFIG_ID_SECTION_OFFSET + ### ### Build options ### @@ -347,5 +349,7 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9 ## Select power on after power fail setting default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" +default CONFIG_ID_SECTION_OFFSET=0x80 + ### End Options.lb end diff --git a/src/mainboard/supermicro/h8dmr/Config.lb b/src/mainboard/supermicro/h8dmr/Config.lb index cc95167ddf..13db09a54d 100644 --- a/src/mainboard/supermicro/h8dmr/Config.lb +++ b/src/mainboard/supermicro/h8dmr/Config.lb @@ -110,8 +110,8 @@ end ## ## Include an id string (For safe flashing) ## -mainboardinit southbridge/nvidia/mcp55/id.inc -ldscript /southbridge/nvidia/mcp55/id.lds +mainboardinit arch/i386/lib/id.inc +ldscript /arch/i386/lib/id.lds ## ## ROMSTRAP table for MCP55 diff --git a/src/mainboard/supermicro/h8dmr/Makefile.inc b/src/mainboard/supermicro/h8dmr/Makefile.inc index 8b64208a18..5d5c44ae4b 100644 --- a/src/mainboard/supermicro/h8dmr/Makefile.inc +++ b/src/mainboard/supermicro/h8dmr/Makefile.inc @@ -33,7 +33,7 @@ initobj-y += crt0.o crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc -crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc +crt0-y += ../../../../src/arch/i386/lib/id.inc crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc crt0-y += auto.inc @@ -41,7 +41,7 @@ crt0-y += auto.inc ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds -ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds +ldscript-y += ../../../../src/arch/i386/lib/id.lds ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds ldscript-y += ../../../../src/arch/i386/lib/failover.lds diff --git a/src/mainboard/supermicro/h8dmr/Options.lb b/src/mainboard/supermicro/h8dmr/Options.lb index 5e457d03aa..f0e9082663 100644 --- a/src/mainboard/supermicro/h8dmr/Options.lb +++ b/src/mainboard/supermicro/h8dmr/Options.lb @@ -112,6 +112,8 @@ uses CONFIG_WAIT_BEFORE_CPUS_INIT uses CONFIG_USE_PRINTK_IN_CAR +uses CONFIG_ID_SECTION_OFFSET + ### ### Build options ### @@ -345,5 +347,7 @@ default CONFIG_USE_FAILOVER_IMAGE=0 default CONFIG_USE_FALLBACK_IMAGE=0 default CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE +default CONFIG_ID_SECTION_OFFSET=0x80 + ### End Options.lb end diff --git a/src/mainboard/supermicro/h8dmr_fam10/Config.lb b/src/mainboard/supermicro/h8dmr_fam10/Config.lb index cd9dd541e2..fe2d1b6ff8 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Config.lb +++ b/src/mainboard/supermicro/h8dmr_fam10/Config.lb @@ -112,8 +112,8 @@ end ## ## Include an id string (For safe flashing) ## -mainboardinit southbridge/nvidia/mcp55/id.inc -ldscript /southbridge/nvidia/mcp55/id.lds +mainboardinit arch/i386/lib/id.inc +ldscript /arch/i386/lib/id.lds ## ## ROMSTRAP table for MCP55 diff --git a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc index 8b64208a18..5d5c44ae4b 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc +++ b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc @@ -33,7 +33,7 @@ initobj-y += crt0.o crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc -crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc +crt0-y += ../../../../src/arch/i386/lib/id.inc crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc crt0-y += auto.inc @@ -41,7 +41,7 @@ crt0-y += auto.inc ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds -ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds +ldscript-y += ../../../../src/arch/i386/lib/id.lds ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds ldscript-y += ../../../../src/arch/i386/lib/failover.lds diff --git a/src/mainboard/supermicro/h8dmr_fam10/Options.lb b/src/mainboard/supermicro/h8dmr_fam10/Options.lb index e2739a6fba..a7d3ca8095 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Options.lb +++ b/src/mainboard/supermicro/h8dmr_fam10/Options.lb @@ -115,6 +115,7 @@ uses CONFIG_AMDMCT uses CONFIG_USE_PRINTK_IN_CAR uses CONFIG_AMD_UCODE_PATCH_FILE +uses CONFIG_ID_SECTION_OFFSET ### ### Build options @@ -356,5 +357,7 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" default CONFIG_USE_FAILOVER_IMAGE=0 default CONFIG_USE_FALLBACK_IMAGE=0 default CONFIG_XIP_ROM_SIZE=CONFIG_FAILOVER_SIZE + +default CONFIG_ID_SECTION_OFFSET=0x80 ### End Options.lb end |