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Diffstat (limited to 'src/mainboard/thomson/ip1000/Config.lb')
| -rw-r--r-- | src/mainboard/thomson/ip1000/Config.lb | 145 |
1 files changed, 145 insertions, 0 deletions
diff --git a/src/mainboard/thomson/ip1000/Config.lb b/src/mainboard/thomson/ip1000/Config.lb new file mode 100644 index 0000000000..9405695608 --- /dev/null +++ b/src/mainboard/thomson/ip1000/Config.lb @@ -0,0 +1,145 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2008 Joseph Smith <joe@settoplinux.org> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE) +else + default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE) + default ROM_SECTION_OFFSET = 0 +end +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) +default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE) +default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE) +default XIP_ROM_SIZE = 65536 +default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE) +arch i386 end +driver mainboard.o +if HAVE_PIRQ_TABLE object irq_tables.o end +# object reset.o +if HAVE_ACPI_TABLES + object fadt.o + object dsdt.o + object acpi_tables.o +end +makerule ./failover.E + depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" +end +makerule ./failover.inc + depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" +end +makerule ./auto.E + # depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + depends "$(MAINBOARD)/auto.c ./romcc" + action "./romcc -E -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" +end +makerule ./auto.inc + # depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + depends "$(MAINBOARD)/auto.c ./romcc" + action "./romcc -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" +end +mainboardinit cpu/x86/16bit/entry16.inc +mainboardinit cpu/x86/32bit/entry32.inc +ldscript /cpu/x86/16bit/entry16.lds +ldscript /cpu/x86/32bit/entry32.lds +if USE_FALLBACK_IMAGE + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds +else + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds +end +mainboardinit arch/i386/lib/cpu_reset.inc +mainboardinit arch/i386/lib/id.inc +ldscript /arch/i386/lib/id.lds +if USE_FALLBACK_IMAGE + ldscript /arch/i386/lib/failover.lds + mainboardinit ./failover.inc +end +mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/mmx/enable_mmx.inc +mainboardinit ./auto.inc +mainboardinit cpu/x86/mmx/disable_mmx.inc +dir /pc80 +config chip.h + +chip northbridge/intel/i82830 # Northbridge + device pci_domain 0 on # PCI domain + device pci 0.0 on end # Host bridge + chip drivers/pci/onboard # Onboard VGA + device pci 2.0 on end # VGA (Intel 82830 CGC) + register "rom_address" = "0xfff00000" + end + chip southbridge/intel/i82801xx # Southbridge + device pci 1d.0 on end # USB UHCI Controller #1 + device pci 1d.1 on end # USB UHCI Controller #2 + device pci 1d.2 on end # USB UHCI Controller #3 + device pci 1d.7 on end # USB2 EHCI Controller + device pci 1e.0 on # PCI bridge + device pci 08.0 on end # Intel 82801DB PRO/100 VE Ethernet + end + device pci 1f.0 on # ISA/LPC bridge + chip superio/smsc/smscsuperio # Super I/O + device pnp 2e.0 off # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.3 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + drq 0x74 = 4 + end + device pnp 2e.4 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.5 on # Com2 / IR + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.7 on # PS/2 keyboard/mouse + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 # Keyboard interrupt + irq 0x72 = 12 # Mouse interrupt + end + device pnp 2e.9 off end # Game port + device pnp 2e.a on # PME + io 0x60 = 0x800 + end + device pnp 2e.b off end # MPU-401 + end + end + device pci 1f.1 on end # IDE + device pci 1f.3 on end # SMBus + device pci 1f.5 on end # AC'97 audio + device pci 1f.6 off end # AC'97 modem + end + end + device apic_cluster 0 on # APIC cluster + chip cpu/intel/socket_PGA370 # Low Voltage PIII Micro-FCBGA Socket 479 + device apic 0 on end # APIC + end + end +end + |