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-rw-r--r--src/mainboard/traverse/geos/romstage.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
index 07962d33fd..44623db505 100644
--- a/src/mainboard/traverse/geos/romstage.c
+++ b/src/mainboard/traverse/geos/romstage.c
@@ -29,7 +29,6 @@
#include "cpu/x86/bist.h"
#include "cpu/x86/msr.h"
#include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -54,8 +53,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- post_code(0x01);
-
static const struct mem_controller memctrl[] = {
{.channel0 = {DIMM0, DIMM1}}
};