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Diffstat (limited to 'src/mainboard/tyan/s2880/failover.c')
-rw-r--r--src/mainboard/tyan/s2880/failover.c32
1 files changed, 22 insertions, 10 deletions
diff --git a/src/mainboard/tyan/s2880/failover.c b/src/mainboard/tyan/s2880/failover.c
index cda8ea8076..8eeeaef7e1 100644
--- a/src/mainboard/tyan/s2880/failover.c
+++ b/src/mainboard/tyan/s2880/failover.c
@@ -2,25 +2,37 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
+#include <arch/io.h>
#include "arch/romcc_io.h"
#include "pc80/mc146818rtc_early.c"
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
-
-
+#include "cpu/p6/boot_cpu.c"
+#include "northbridge/amd/amdk8/reset_test.c"
static void main(void)
{
- if (do_normal_boot()) {
- /* Nothing special needs to be done to find bus 0 */
-
- /* Allow the HT devices to be found */
- enumerate_ht_chain();
+ /* Nothing special needs to be done to find bus 0 */
+ /* Allow the HT devices to be found */
+ enumerate_ht_chain(0);
- /* Setup the 8111 */
- amd8111_enable_rom();
+ /* Setup the 8111 */
+ amd8111_enable_rom();
- /* Jump to the normal image */
+ /* Is this a cpu reset? */
+ if (cpu_init_detected()) {
+ if (last_boot_normal()) {
+ asm("jmp __normal_image");
+ } else {
+ asm("jmp __cpu_reset");
+ }
+ }
+ /* Is this a secondary cpu? */
+ else if (!boot_cpu() && last_boot_normal()) {
+ asm("jmp __normal_image");
+ }
+ /* This is the primary cpu how should I boot? */
+ else if (do_normal_boot()) {
asm("jmp __normal_image");
}
}