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-rw-r--r--src/mainboard/tyan/s2891/Config.lb123
1 files changed, 0 insertions, 123 deletions
diff --git a/src/mainboard/tyan/s2891/Config.lb b/src/mainboard/tyan/s2891/Config.lb
deleted file mode 100644
index 42627a35f1..0000000000
--- a/src/mainboard/tyan/s2891/Config.lb
+++ /dev/null
@@ -1,123 +0,0 @@
-## CONFIG_XIP_ROM_SIZE must be a power of 2.
-default CONFIG_XIP_ROM_SIZE = 64 * 1024
-include /config/nofailovercalculation.lb
-default CONFIG_ROM_PAYLOAD = 1
-
-arch i386 end
-
-##
-## Build the objects we have code for in this directory.
-##
-
-driver mainboard.o
-
-#dir /drivers/ati/ragexl
-
-#needed by irq_tables and mptable and acpi_tables
-object get_bus_conf.o
-
-if CONFIG_GENERATE_MP_TABLE object mptable.o end
-if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
-
-if CONFIG_GENERATE_ACPI_TABLES
- object acpi_tables.o
- makerule dsdt.c
- depends "$(CONFIG_MAINBOARD)/dsdt.dsl"
- action "iasl -p $(CURDIR)/dsdt -tc $(CONFIG_MAINBOARD)/dsdt.dsl"
- action "mv dsdt.hex dsdt.c"
- end
- object ./dsdt.o
- #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
- #./fadt.o is moved to southbridge/nvidia/ck804/Config.lb
-end
-
-if CONFIG_USE_INIT
- makerule ./auto.o
- depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
- action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
- end
-else
- makerule ./auto.inc
- depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
- action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
- action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
- action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
- end
-end
-
-##
-## Build our 16 bit and 32 bit coreboot entry code
-##
-if CONFIG_USE_FALLBACK_IMAGE
- mainboardinit cpu/x86/16bit/entry16.inc
- ldscript /cpu/x86/16bit/entry16.lds
-end
-
-mainboardinit cpu/x86/32bit/entry32.inc
-
- if CONFIG_USE_INIT
- ldscript /cpu/x86/32bit/entry32.lds
- end
-
- if CONFIG_USE_INIT
- ldscript /cpu/amd/car/cache_as_ram.lds
- end
-
-##
-## Build our reset vector (This is where coreboot is entered)
-##
-if CONFIG_USE_FALLBACK_IMAGE
- mainboardinit cpu/x86/16bit/reset16.inc
- ldscript /cpu/x86/16bit/reset16.lds
-else
- mainboardinit cpu/x86/32bit/reset32.inc
- ldscript /cpu/x86/32bit/reset32.lds
-end
-
-##
-## Include an id string (For safe flashing)
-##
-mainboardinit arch/i386/lib/id.inc
-ldscript /arch/i386/lib/id.lds
-
-##
-## ROMSTRAP table for CK804
-##
-if CONFIG_USE_FALLBACK_IMAGE
- mainboardinit southbridge/nvidia/ck804/romstrap.inc
- ldscript /southbridge/nvidia/ck804/romstrap.lds
-end
-
- ##
- ## Setup Cache-As-Ram
- ##
- mainboardinit cpu/amd/car/cache_as_ram.inc
-
-###
-### This is the early phase of coreboot startup
-### Things are delicate and we test to see if we should
-### failover to another image.
-###
-if CONFIG_USE_FALLBACK_IMAGE
- ldscript /arch/i386/lib/failover.lds
-end
-
-###
-### O.k. We aren't just an intermediary anymore!
-###
-
-##
-## Setup RAM
-##
- if CONFIG_USE_INIT
- initobject auto.o
- else
- mainboardinit ./auto.inc
- end
-
-##
-## Include the secondary Configuration files
-##
-config chip.h
-
-include devicetree.cb