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Diffstat (limited to 'src/mainboard/tyan/s2912_fam10/romstage.c')
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index e8bca07ce5..29e4060243 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -53,7 +53,6 @@ static void post_code(u8 value) {
outb(value, 0x80);
}
-#if CONFIG_USE_FAILOVER_IMAGE==0
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#if CONFIG_USBDEBUG_DIRECT
@@ -68,15 +67,11 @@ static void post_code(u8 value) {
#include "northbridge/amd/amdfam10/raminit.h"
#include "northbridge/amd/amdfam10/amdfam10.h"
-#endif
-
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdfam10/reset_test.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "superio/winbond/w83627hf/w83627hf_early_init.c"
-#if CONFIG_USE_FAILOVER_IMAGE==0
-
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdfam10/debug.c"
@@ -142,8 +137,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_10xxx/fidvid.c"
-#endif
-
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdfam10/early_ht.c"
@@ -168,7 +161,6 @@ static void sio_setup(void)
}
-#if CONFIG_USE_FAILOVER_IMAGE==0
#include "spd_addr.h"
#include "cpu/amd/microcode/microcode.c"
#include "cpu/amd/model_10xxx/update_microcode.c"
@@ -317,5 +309,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x43); // Should never see this post code.
}
-
-#endif