diff options
Diffstat (limited to 'src/mainboard/tyan/s2912_fam10')
| -rw-r--r-- | src/mainboard/tyan/s2912_fam10/romstage.c | 43 |
1 files changed, 26 insertions, 17 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index e095b7960e..4491df56ca 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -30,34 +30,36 @@ #include <lib.h> #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> -#include "southbridge/nvidia/mcp55/early_smbus.c" -#include <northbridge/amd/amdfam10/raminit.h> -#include <northbridge/amd/amdfam10/amdfam10.h> #include <delay.h> #include <cpu/x86/lapic.h> -#include "northbridge/amd/amdfam10/reset_test.c" +#include <cpu/amd/car.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> -#include "northbridge/amd/amdfam10/debug.c" -#include "northbridge/amd/amdfam10/setup_resource_map.c" +#include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdht/ht_wrapper.h> +#include <cpu/amd/family_10h-family_15h/init_cpus.h> +#include <arch/early_variables.h> +#include <cbmem.h> +#include "southbridge/nvidia/mcp55/early_smbus.c" #include "southbridge/nvidia/mcp55/early_ctrl.c" +#include "resourcemap.c" +#include "cpu/amd/quadcore/quadcore.c" + #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -static void activate_spd_rom(const struct mem_controller *ctrl) { } +void activate_spd_rom(const struct mem_controller *ctrl); +int spd_read_byte(unsigned device, unsigned address); +extern struct sys_info sysinfo_car; + +void activate_spd_rom(const struct mem_controller *ctrl) { } -static inline int spd_read_byte(unsigned device, unsigned address) +inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } -#include <northbridge/amd/amdfam10/amdfam10.h> -#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/pci.c" -#include "resourcemap.c" -#include "cpu/amd/quadcore/quadcore.c" - #define MCP55_MB_SETUP \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+37, 0x00, 0x44,/* GPIO38 PCI_REQ3 */ \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x44,/* GPIO39 PCI_GNT3 */ \ @@ -68,10 +70,17 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include <southbridge/nvidia/mcp55/early_setup_ss.h> #include "southbridge/nvidia/mcp55/early_setup_car.c" -#include <cpu/amd/microcode.h> -#include "cpu/amd/family_10h-family_15h/init_cpus.c" -#include "northbridge/amd/amdfam10/early_ht.c" +unsigned get_sbdn(unsigned bus) +{ + pci_devfn_t dev; + + /* Find the device. */ + dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_NVIDIA, + PCI_DEVICE_ID_NVIDIA_MCP55_HT), bus); + + return (dev >> 15) & 0x1f; +} static void sio_setup(void) { |